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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h
index 02d9d76616..c12345f872 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspsUpd.h
@@ -876,7 +876,7 @@ typedef struct {
/** Offset 0x0436 - CdClock Frequency selection
0: 172.8 MHz, 1: 180 MHz, 2: 192 MHz, 3: 307 MHz, 4: 312 MHz, 5: 552 MHz, 6: 556.8 MHz,
- 7: 648 MHz, 8: 652.8 MHz, 0xff: 648 MHz (Default)
+ 0xff: 556.8 MHz (Default)
**/
UINT8 CdClock;