diff options
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h | 96 |
1 files changed, 87 insertions, 9 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h index a792e703f3..b3c96617c0 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/FsptUpd.h @@ -1,3 +1,35 @@ +/** @file + +Copyright (c) 2020, Intel Corporation. All rights reserved.<BR> + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. +* Neither the name of Intel Corporation nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + THE POSSIBILITY OF SUCH DAMAGE. + + This file is automatically generated. Please do NOT modify !!! + +**/ + #ifndef __FSPTUPD_H__ #define __FSPTUPD_H__ @@ -5,25 +37,71 @@ #pragma pack(1) + +/** FSP-T Core UPD +**/ typedef struct { - uint32_t MicrocodeRegionBase; - uint32_t MicrocodeRegionLength; - uint32_t CodeRegionBase; - uint32_t CodeRegionLength; - uint8_t Reserved1[16]; + +/** Offset 0x0020 +**/ + UINT32 MicrocodeRegionBase; + +/** Offset 0x0024 +**/ + UINT32 MicrocodeRegionLength; + +/** Offset 0x0028 +**/ + UINT32 CodeRegionBase; + +/** Offset 0x002C +**/ + UINT32 CodeRegionLength; + +/** Offset 0x0030 +**/ + UINT8 Reserved1[16]; } FSPT_CORE_UPD; +/** FSP-T Configuration +**/ typedef struct { - uint8_t PcdFsptPort80RouteDisable; - uint8_t ReservedTempRamInitUpd[31]; + +/** Offset 0x0040 - Disable Port80 output in FSP-T + Select Port80 Control in FSP-T (0:VPD-Style, 1:Enable Port80 Output, 2:Disable Port80 + Output, refer to FSP Integration Guide for details + 0:VPD-Style, 1:Enable Port80 Output[Default], 2:Disable Port80 Output +**/ + UINT8 FsptPort80RouteDisable; + +/** Offset 0x0041 +**/ + UINT8 ReservedTempRamInitUpd[31]; } FSPT_CONFIG; +/** Fsp T UPD Configuration +**/ typedef struct { + +/** Offset 0x0000 +**/ FSP_UPD_HEADER FspUpdHeader; + +/** Offset 0x0020 +**/ FSPT_CORE_UPD FsptCoreUpd; + +/** Offset 0x0040 +**/ FSPT_CONFIG FsptConfig; - uint8_t UnusedUpdSpace0[6]; - uint16_t UpdTerminator; + +/** Offset 0x0060 +**/ + UINT8 UnusedUpdSpace0[6]; + +/** Offset 0x0066 +**/ + UINT16 UpdTerminator; } FSPT_UPD; #pragma pack() |