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path: root/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
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Diffstat (limited to 'src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat')
-rw-r--r--src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
index 70f204db04..08351907c7 100644
--- a/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
+++ b/src/vendorcode/intel/fsp/fsp1_1/checklist/romstage_optional.dat
@@ -23,8 +23,6 @@ platform_segment_loaded
save_chromeos_gpios
soc_after_ram_init
soc_display_memory_init_params
-soc_display_mtrrs
-soc_get_variable_mtrr_count
soc_memory_init_params
soc_pre_ram_init
southbridge_smi_handler