3 files changed, 5 insertions, 11 deletions
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index a7219bd2c1..79d6918e96 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -44,14 +44,6 @@ config VBNV_OFFSET
 	  CMOS offset for VbNv data. This value must match cmos.layout
 	  in the mainboard directory, minus 14 bytes for the RTC.
 
-config VBNV_SIZE
-	hex
-	default 0x10
-	depends on PC80_SYSTEM
-	help
-	  CMOS storage size for VbNv data. This value must match cmos.layout
-	  in the mainboard directory.
-
 config CHROMEOS_VBNV_CMOS
 	bool "Vboot non-volatile storage in CMOS."
 	default n
diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl
index 5b2a26e93e..66ebbc1819 100644
--- a/src/vendorcode/google/chromeos/acpi/chromeos.asl
+++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl
@@ -13,6 +13,8 @@
  * GNU General Public License for more details.
  */
 
+#include <vendorcode/google/chromeos/vbnv_layout.h>
+
 Device (CRHW)
 {
 	Name(_HID, EISAID("GGL0001"))
@@ -70,7 +72,7 @@ Device (CRHW)
 			// See src/vendorcode/google/chromeos/Kconfig
 			// for the definition of these:
 			CONFIG_VBNV_OFFSET,
-			CONFIG_VBNV_SIZE
+			VBNV_BLOCK_SIZE
 		})
 		Return(VNBV)
 	}
diff --git a/src/vendorcode/google/chromeos/vbnv_cmos.c b/src/vendorcode/google/chromeos/vbnv_cmos.c
index ddcb765fc7..e0d7ba1ea3 100644
--- a/src/vendorcode/google/chromeos/vbnv_cmos.c
+++ b/src/vendorcode/google/chromeos/vbnv_cmos.c
@@ -22,7 +22,7 @@ void read_vbnv_cmos(uint8_t *vbnv_copy)
 {
 	int i;
 
-	for (i = 0; i < CONFIG_VBNV_SIZE; i++)
+	for (i = 0; i < VBNV_BLOCK_SIZE; i++)
 		vbnv_copy[i] = cmos_read(CONFIG_VBNV_OFFSET + 14 + i);
 }
 
@@ -30,6 +30,6 @@ void save_vbnv_cmos(const uint8_t *vbnv_copy)
 {
 	int i;
 
-	for (i = 0; i < CONFIG_VBNV_SIZE; i++)
+	for (i = 0; i < VBNV_BLOCK_SIZE; i++)
 		cmos_write(vbnv_copy[i], CONFIG_VBNV_OFFSET + 14 + i);
 }