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path: root/src/vendorcode/google/chromeos/vboot2/verstage.c
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Diffstat (limited to 'src/vendorcode/google/chromeos/vboot2/verstage.c')
-rw-r--r--src/vendorcode/google/chromeos/vboot2/verstage.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c
index bc7846a37d..783d1b613b 100644
--- a/src/vendorcode/google/chromeos/vboot2/verstage.c
+++ b/src/vendorcode/google/chromeos/vboot2/verstage.c
@@ -209,6 +209,22 @@ static uint32_t extend_pcrs(struct vb2_context *ctx)
tpm_extend_pcr(ctx, 1, HWID_DIGEST_PCR);
}
+static void init_vb2_working_data(void)
+{
+ struct vb2_working_data *wd;
+ size_t work_size;
+
+ work_size = vb2_working_data_size();
+ wd = vboot_get_working_data();
+ memset(wd, 0, work_size);
+ /*
+ * vboot prefers 16-byte alignment. This takes away 16 bytes
+ * from the VBOOT2_WORK region, but the vboot devs said that's okay.
+ */
+ wd->buffer_offset = ALIGN_UP(sizeof(*wd), 16);
+ wd->buffer_size = work_size - wd->buffer_offset;
+}
+
/**
* Verify and select the firmware in the RW image
*
@@ -219,8 +235,10 @@ void verstage_main(void)
{
struct vb2_context ctx;
struct region_device fw_main;
- struct vb2_working_data *wd = vboot_get_working_data();
+ struct vb2_working_data *wd;
int rv;
+ init_vb2_working_data();
+ wd = vboot_get_working_data();
timestamp_add_now(TS_START_VBOOT);
/* Set up context and work buffer */