diff options
Diffstat (limited to 'src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h')
| -rw-r--r-- | src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h | 236 |
1 files changed, 236 insertions, 0 deletions
diff --git a/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h b/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h new file mode 100644 index 0000000000..d68a6d297f --- /dev/null +++ b/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-pcie.h @@ -0,0 +1,236 @@ +/***********************license start*********************************** +* Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights +* reserved. +* +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are +* met: +* +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* +* * Redistributions in binary form must reproduce the above +* copyright notice, this list of conditions and the following +* disclaimer in the documentation and/or other materials provided +* with the distribution. +* +* * Neither the name of Cavium Inc. nor the names of +* its contributors may be used to endorse or promote products +* derived from this software without specific prior written +* permission. +* +* This Software, including technical data, may be subject to U.S. export +* control laws, including the U.S. Export Administration Act and its +* associated regulations, and may be subject to export or import +* regulations in other countries. +* +* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" +* AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR +* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT +* TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY +* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT +* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES +* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR +* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, +* QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK +* ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU. +***********************license end**************************************/ + +/** + * @file + * + * Interface to PCIe as a host(RC) or target(EP) + * + * <hr>$Revision: 51109 $<hr> + * + * @addtogroup hal + * @{ + */ + +typedef enum +{ + BDK_PCIE_MEM_CONFIG, /* Config space */ + BDK_PCIE_MEM_NORMAL, /* Memory, not prefetchable */ + BDK_PCIE_MEM_PREFETCH, /* Memory, prefetchable */ + BDK_PCIE_MEM_IO, /* IO */ +} bdk_pcie_mem_t; + +/** + * Return the number of possible PCIe ports on a node. The actual number + * of configured ports may be less and may also be disjoint. + * + * @param node Node to query + * + * @return Number of PCIe ports that are possible + */ +int bdk_pcie_get_num_ports(bdk_node_t node); + +/** + * Initialize a PCIe port for use in host(RC) mode. It doesn't enumerate the bus. + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port to initialize + * + * @return Zero on success + */ +int bdk_pcie_rc_initialize(bdk_node_t node, int pcie_port); + +/** + * Shutdown a PCIe port and put it in reset + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port to shutdown + * + * @return Zero on success + */ +int bdk_pcie_rc_shutdown(bdk_node_t node, int pcie_port); + +/** + * Return the Core physical base address for PCIe MEM access. Memory is + * read/written as an offset from this address. + * + * @param node Node to use in a Numa setup + * @param pcie_port PCIe port the memory is on + * @param mem_type Type of memory + * + * @return 64bit physical address for read/write + */ +uint64_t bdk_pcie_get_base_address(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type); + +/** + * Size of the Mem address region returned at address + * bdk_pcie_get_base_address() + * + * @param node Node to use in a Numa setup + * @param pcie_port PCIe port the IO is for + * @param mem_type Type of memory + * + * @return Size of the Mem window + */ +uint64_t bdk_pcie_get_base_size(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type); + +/** + * Read 8bits from a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * + * @return Result of the read + */ +uint8_t bdk_pcie_config_read8(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg); + +/** + * Read 16bits from a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * + * @return Result of the read + */ +uint16_t bdk_pcie_config_read16(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg); + +/** + * Read 32bits from a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * + * @return Result of the read + */ +uint32_t bdk_pcie_config_read32(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg) BDK_WEAK; + +/** + * Write 8bits to a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * @param val Value to write + */ +void bdk_pcie_config_write8(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint8_t val); + +/** + * Write 16bits to a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * @param val Value to write + */ +void bdk_pcie_config_write16(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint16_t val); + +/** + * Write 32bits to a Device's config space + * + * @param node Node to use in a Numa setup. Can be an exact ID or a special + * value. + * @param pcie_port PCIe port the device is on + * @param bus Sub bus + * @param dev Device ID + * @param fn Device sub function + * @param reg Register to access + * @param val Value to write + */ +void bdk_pcie_config_write32(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg, uint32_t val) BDK_WEAK; + +/** + * Read 64bits from PCIe using a memory transaction + * + * @param node Node to read from + * @param pcie_port PCIe port to read + * @param address PCIe address to read + * + * @return Result of the read + */ +uint64_t bdk_pcie_mem_read64(bdk_node_t node, int pcie_port, uint64_t address); + +/** + * Write 64bits to PCIe memory + * + * @param node Node to write to + * @param pcie_port PCIe port to use + * @param address Address to write + * @param data Data to write + */ +void bdk_pcie_mem_write64(bdk_node_t node, int pcie_port, uint64_t address, uint64_t data); + +/** + * These are the operations defined that can vary per chip generation + */ +typedef struct +{ + int (*get_num_ports)(bdk_node_t node); + int (*rc_initialize)(bdk_node_t node, int pcie_port); + int (*rc_shutdown)(bdk_node_t node, int pcie_port); + uint64_t (*get_base_address)(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type); + uint64_t (*get_base_size)(bdk_node_t node, int pcie_port, bdk_pcie_mem_t mem_type); + uint64_t (*build_config_addr)(bdk_node_t node, int pcie_port, int bus, int dev, int fn, int reg); +} __bdk_pcie_ops_t; + +/** @} */ |