6 files changed, 23 insertions, 6 deletions
diff --git a/src/vendorcode/amd/opensil/Kconfig b/src/vendorcode/amd/opensil/Kconfig
index 00f373f142..3daae5071d 100644
--- a/src/vendorcode/amd/opensil/Kconfig
+++ b/src/vendorcode/amd/opensil/Kconfig
@@ -23,4 +23,13 @@ config AMD_OPENSIL_PATH
 	  Set to the path of the openSIL directory containing meson.build.
 	  example
 
+config AMD_OPENSIL_MPIO_CHIP_H_FILE
+	string "Location of specific MPIO chip.h implementation"
+	default "../../genoa_poc/mpio/chip.h" if SOC_AMD_OPENSIL_GENOA_POC
+	default "../../stub/mpio/chip.h"
+	help
+	  Set to the location of the MPIO chip.h in the selected openSIL
+	  implementation, so that the common MPIO chip.h file can include the
+	  specific one.
+
 endif
diff --git a/src/vendorcode/amd/opensil/chip/mpio/chip.h b/src/vendorcode/amd/opensil/chip/mpio/chip.h
new file mode 100644
index 0000000000..812df6b6d4
--- /dev/null
+++ b/src/vendorcode/amd/opensil/chip/mpio/chip.h
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef OPENSIL_MPIO_CHIP_H
+#define OPENSIL_MPIO_CHIP_H
+
+#include CONFIG_AMD_OPENSIL_MPIO_CHIP_H_FILE
+
+#endif /* OPENSIL_MPIO_CHIP_H */
diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c
index 089096f8c4..609ac5516d 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c
+++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c
@@ -9,7 +9,7 @@
 #include "chip.h"
 #include "../opensil.h"
 
-struct chip_operations vendorcode_amd_opensil_genoa_poc_mpio_ops = {
+struct chip_operations vendorcode_amd_opensil_chip_mpio_ops = {
 	.name = "AMD GENOA MPIO",
 };
 
@@ -130,7 +130,7 @@ static void per_device_config(MPIOCLASS_INPUT_BLK *mpio_data, struct device *dev
 	static uint32_t slot_num;
 	const uint32_t domain = dev->upstream->dev->path.domain.domain;
 	const uint32_t devfn = dev->path.pci.devfn;
-	const struct vendorcode_amd_opensil_genoa_poc_mpio_config *const config = dev->chip_info;
+	const struct vendorcode_amd_opensil_chip_mpio_config *const config = dev->chip_info;
 	printk(BIOS_DEBUG, "Setting MPIO port for domain 0x%x, PCI %d:%d\n",
 	       domain, PCI_SLOT(devfn), PCI_FUNC(devfn));
 
@@ -199,7 +199,7 @@ void configure_mpio(void)
 
 	/* Find all devices with this chip that are directly below the chip */
 	for (struct device *dev = &dev_root; dev; dev = dev->next)
-		if (dev->chip_ops == &vendorcode_amd_opensil_genoa_poc_mpio_ops &&
+		if (dev->chip_ops == &vendorcode_amd_opensil_chip_mpio_ops &&
 		    dev->chip_info != dev->upstream->dev->chip_info)
 			per_device_config(mpio_data, dev);
 }
diff --git a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
index 36d6bafce8..9b4d226b49 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
+++ b/src/vendorcode/amd/opensil/genoa_poc/mpio/chip.h
@@ -54,7 +54,7 @@ enum pcie_aspm {
 	L0sL1,
 };
 
-struct vendorcode_amd_opensil_genoa_poc_mpio_config {
+struct vendorcode_amd_opensil_chip_mpio_config {
 	enum mpio_type type;
 	uint8_t start_lane;
 	uint8_t end_lane;
diff --git a/src/vendorcode/amd/opensil/stub/mpio/chip.c b/src/vendorcode/amd/opensil/stub/mpio/chip.c
index 895814ded3..9b515b3257 100644
--- a/src/vendorcode/amd/opensil/stub/mpio/chip.c
+++ b/src/vendorcode/amd/opensil/stub/mpio/chip.c
@@ -3,6 +3,6 @@
 #include <device/device.h>
 #include "chip.h"
 
-struct chip_operations vendorcode_amd_opensil_stub_mpio_ops = {
+struct chip_operations vendorcode_amd_opensil_chip_mpio_ops = {
 	.name = "AMD openSIL stub MPIO",
 };
diff --git a/src/vendorcode/amd/opensil/stub/mpio/chip.h b/src/vendorcode/amd/opensil/stub/mpio/chip.h
index 0957ff0213..456463336b 100644
--- a/src/vendorcode/amd/opensil/stub/mpio/chip.h
+++ b/src/vendorcode/amd/opensil/stub/mpio/chip.h
@@ -60,7 +60,7 @@ enum pcie_slot_power_limit_scale {
 	SLOT_POWER_LIMIT_DIVISOR_1000 = 3,	/* Scale factor 0.001 */
 };
 
-struct vendorcode_amd_opensil_stub_mpio_config {
+struct vendorcode_amd_opensil_chip_mpio_config {
 	enum mpio_engine_type type;
 	uint8_t start_lane;
 	uint8_t end_lane;