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-rw-r--r--src/vendorcode/amd/pi/00670F00/binaryPI/gcc-intrin.h499
1 files changed, 185 insertions, 314 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/binaryPI/gcc-intrin.h b/src/vendorcode/amd/pi/00670F00/binaryPI/gcc-intrin.h
index c6b5c63378..5d77c4de4d 100644
--- a/src/vendorcode/amd/pi/00670F00/binaryPI/gcc-intrin.h
+++ b/src/vendorcode/amd/pi/00670F00/binaryPI/gcc-intrin.h
@@ -1,241 +1,205 @@
/*
- Compatibility <intrin_x86.h> header for GCC -- GCC equivalents of intrinsic
- Microsoft Visual C++ functions. Originally developed for the ReactOS
- (<http://www.reactos.org/>) and TinyKrnl (<http://www.tinykrnl.org/>)
- projects.
-
- Copyright (c) 2006 KJK::Hyperion <hackbunny@reactos.com>
- 2014 Sage Electronic Engineering, LLC
-
- Permission is hereby granted, free of charge, to any person obtaining a
- copy of this software and associated documentation files (the "Software"),
- to deal in the Software without restriction, including without limitation
- the rights to use, copy, modify, merge, publish, distribute, sublicense,
- and/or sell copies of the Software, and to permit persons to whom the
- Software is furnished to do so, subject to the following conditions:
-
- The above copyright notice and this permission notice shall be included in
- all copies or substantial portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- DEALINGS IN THE SOFTWARE.
-*/
+ * Copyright (c) 2011, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2014, Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Advanced Micro Devices, Inc. nor the names of
+ * its contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
#if defined (__GNUC__)
-
+#include <stdint.h>
/* I/O intrin functions. */
-static
-__inline__ __attribute__((always_inline))
-unsigned char __inbyte(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint8_t __inbyte(uint16_t Port)
{
- unsigned char value;
+ uint8_t value;
__asm__ __volatile__ (
- "in %%dx, %%al"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned short __inword(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint16_t __inword(uint16_t Port)
{
- unsigned short value;
+ uint16_t value;
__asm__ __volatile__ (
- "in %%dx, %%ax"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __indword(unsigned short Port)
+static __inline__ __attribute__((always_inline)) uint32_t __indword(uint16_t Port)
{
- unsigned long value;
+ uint32_t value;
__asm__ __volatile__ (
- "in %%dx, %%eax"
+ "in %1, %0"
: "=a" (value)
- : "d" (Port)
+ : "Nd" (Port)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-void __outbyte(unsigned short Port,unsigned char Data)
+static __inline__ __attribute__((always_inline)) void __outbyte(uint16_t Port,uint8_t Data)
{
__asm__ __volatile__ (
- "out %%al, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __outword(unsigned short Port,unsigned short Data)
+static __inline__ __attribute__((always_inline)) void __outword(uint16_t Port,uint16_t Data)
{
__asm__ __volatile__ (
- "out %%ax, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __outdword(unsigned short Port,unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __outdword(uint16_t Port,uint32_t Data)
{
__asm__ __volatile__ (
- "out %%eax, %%dx"
+ "out %0, %1"
:
- : "a" (Data), "d" (Port)
+ : "a" (Data), "Nd" (Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __inbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __inbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insb "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insb"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __inwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __inwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insw "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insw"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __indwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __indwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; insl "
- : "=D" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; insl"
+ : "+D" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __outbytestring(unsigned short Port,unsigned char *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outbytestring(uint16_t Port,uint8_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsb "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsb"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __outwordstring(unsigned short Port,unsigned short *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outwordstring(uint16_t Port,uint16_t *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsw "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsw"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __outdwordstring(unsigned short Port,unsigned long *Buffer,unsigned long Count)
+static __inline__ __attribute__((always_inline)) void __outdwordstring(uint16_t Port,unsigned long *Buffer,unsigned long Count)
{
__asm__ __volatile__ (
- "cld ; rep ; outsl "
- : "=S" (Buffer), "=c" (Count)
- : "d"(Port), "0"(Buffer), "1" (Count)
+ "rep ; outsl"
+ : "+S" (Buffer), "+c" (Count)
+ : "d"(Port)
);
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr0(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr0(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%dr0, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr1(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr1(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%dr1, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr2(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr2(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%dr2, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr3(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr3(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%dr3, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr7(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr7(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%dr7, %[value]"
- : [value] "=a" (value)
+ : [value] "=r" (value)
);
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readdr(unsigned long reg)
+static __inline__ __attribute__((always_inline)) unsigned long __readdr(unsigned long reg)
{
switch (reg){
case 0:
@@ -263,64 +227,52 @@ unsigned long __readdr(unsigned long reg)
}
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr0(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr0(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr0"
+ "mov %0, %%dr0"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr1(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr1(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr1"
+ "mov %0, %%dr1"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr2(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr2(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr2"
+ "mov %0, %%dr2"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr3(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr3(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr3"
+ "mov %0, %%dr3"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr7(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr7(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%dr7"
+ "mov %0, %%dr7"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writedr(unsigned long reg, unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writedr(unsigned long reg, unsigned long Data)
{
switch (reg){
case 0:
@@ -348,64 +300,52 @@ void __writedr(unsigned long reg, unsigned long Data)
}
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr0(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr0(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%cr0, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr2(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr2(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%cr2, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr3(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr3(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%cr3, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr4(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr4(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%cr4, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr8(void)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr8(void)
{
unsigned long value;
__asm__ __volatile__ (
"mov %%cr8, %[value]"
- : [value] "=a" (value));
+ : [value] "=r" (value));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readcr(unsigned long reg)
+static __inline__ __attribute__((always_inline)) unsigned long __readcr(unsigned long reg)
{
switch (reg){
case 0:
@@ -433,64 +373,53 @@ unsigned long __readcr(unsigned long reg)
}
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr0(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr0(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr0"
+ "mov %0, %%cr0"
:
- : "a" (Data)
+ : "r" (Data)
+ : "memory"
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr2(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr2(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr2"
+ "mov %0, %%cr2"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr3(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr3(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr3"
+ "mov %0, %%cr3"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr4(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr4(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr4"
+ "mov %0, %%cr4"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr8(unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr8(unsigned long Data)
{
__asm__ __volatile__ (
- "mov %%eax, %%cr8"
+ "mov %0, %%cr8"
:
- : "a" (Data)
+ : "r" (Data)
);
}
-static
-__inline__ __attribute__((always_inline))
-void __writecr(unsigned long reg, unsigned long Data)
+static __inline__ __attribute__((always_inline)) void __writecr(unsigned long reg, unsigned long Data)
{
switch (reg){
case 0:
@@ -518,33 +447,27 @@ void __writecr(unsigned long reg, unsigned long Data)
}
}
-static
-__inline__ __attribute__((always_inline))
-UINT64 __readmsr(UINT32 msr)
+static __inline__ __attribute__((always_inline)) UINT64 __readmsr(UINT32 msr)
{
UINT64 retval;
__asm__ __volatile__(
- "rdmsr\n\t"
+ "rdmsr"
: "=A" (retval)
: "c" (msr)
);
return retval;
}
-static
-__inline__ __attribute__((always_inline))
-void __writemsr (UINT32 msr, UINT64 Value)
+static __inline__ __attribute__((always_inline)) void __writemsr (UINT32 msr, UINT64 Value)
{
__asm__ __volatile__ (
- "wrmsr\n\t"
+ "wrmsr"
:
: "c" (msr), "A" (Value)
);
}
-static
-__inline__ __attribute__((always_inline))
-UINT64 __rdtsc(void)
+static __inline__ __attribute__((always_inline)) UINT64 __rdtsc(void)
{
UINT64 retval;
__asm__ __volatile__ (
@@ -553,9 +476,7 @@ UINT64 __rdtsc(void)
return retval;
}
-static
-__inline__ __attribute__((always_inline))
-void __cpuid(int CPUInfo[], const int InfoType)
+static __inline__ __attribute__((always_inline)) void __cpuid(int CPUInfo[], const int InfoType)
{
__asm__ __volatile__(
"cpuid"
@@ -564,93 +485,96 @@ void __cpuid(int CPUInfo[], const int InfoType)
);
}
-static
-__inline__ __attribute__((always_inline))
-void _disable(void)
+
+static __inline__ __attribute__((always_inline)) void _disable(void)
{
__asm__ __volatile__ ("cli");
}
-static
-__inline__ __attribute__((always_inline))
-void _enable(void)
+
+static __inline__ __attribute__((always_inline)) void _enable(void)
{
__asm__ __volatile__ ("sti");
}
-static
-__inline__ __attribute__((always_inline))
-void __halt(void)
+
+static __inline__ __attribute__((always_inline)) void __halt(void)
{
__asm__ __volatile__ ("hlt");
}
-static
-__inline__ __attribute__((always_inline))
-void __debugbreak(void)
+
+static __inline__ __attribute__((always_inline)) void __debugbreak(void)
{
__asm__ __volatile__ ("int3");
}
-static
-__inline__ __attribute__((always_inline))
-void __wbinvd(void)
+static __inline__ __attribute__((always_inline)) void __invd(void)
+{
+ __asm__ __volatile__ ("invd");
+}
+
+static __inline__ __attribute__((always_inline)) void __wbinvd(void)
{
__asm__ __volatile__ ("wbinvd");
}
-static
-__inline__ __attribute__((always_inline))
-void __lidt(void *Source)
+static __inline__ __attribute__((always_inline)) void __lidt(void *Source)
{
__asm__ __volatile__("lidt %0" : : "m"(*(short*)Source));
}
-static
-__inline__ __attribute__((always_inline))
-void __writefsbyte(const unsigned long Offset, const unsigned char Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsbyte(const unsigned long Offset, const uint8_t Data)
{
- __asm__("movb %b[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movb %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "iq" (Data));
}
-static
-__inline__ __attribute__((always_inline))
-void __writefsword(const unsigned long Offset, const unsigned short Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsword(const unsigned long Offset, const uint16_t Data)
{
- __asm__("movw %w[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movw %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "ir" (Data));
}
-static
-__inline__ __attribute__((always_inline))
-void __writefsdword(const unsigned long Offset, const unsigned long Data)
+static __inline__ __attribute__((always_inline)) void
+__writefsdword(const unsigned long Offset, const uint32_t Data)
{
- __asm__("movl %k[Data], %%fs:%a[Offset]" : : [Offset] "ir" (Offset), [Data] "iq" (Data));
+ __asm__ ("movl %[Data], %%fs:%a[Offset]"
+ :
+ : [Offset] "ir" (Offset), [Data] "ir" (Data));
}
-static
-__inline__ __attribute__((always_inline))
-unsigned char __readfsbyte(const unsigned long Offset)
+static __inline__ __attribute__((always_inline)) uint8_t
+__readfsbyte(const unsigned long Offset)
{
unsigned char value;
- __asm__("movb %%fs:%a[Offset], %b[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ __asm__ ("movb %%fs:%a[Offset], %[value]"
+ : [value] "=q" (value)
+ : [Offset] "ir" (Offset));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned short __readfsword(const unsigned long Offset)
+static __inline__ __attribute__((always_inline)) uint16_t
+__readfsword(const unsigned long Offset)
{
unsigned short value;
- __asm__("movw %%fs:%a[Offset], %w[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ __asm__ ("movw %%fs:%a[Offset], %[value]"
+ : [value] "=q" (value)
+ : [Offset] "ir" (Offset));
return value;
}
-static
-__inline__ __attribute__((always_inline))
-unsigned long __readfsdword(const unsigned long Offset)
+static __inline__ __attribute__((always_inline)) uint32_t
+__readfsdword(unsigned long Offset)
{
unsigned long value;
- __asm__("movl %%fs:%a[Offset], %k[value]" : [value] "=q" (value) : [Offset] "irm" (Offset));
+ __asm__ ("mov %%fs:%a[Offset], %[value]"
+ : [value] "=r" (value)
+ : [Offset] "ir" (Offset));
return value;
}
@@ -658,87 +582,34 @@ unsigned long __readfsdword(const unsigned long Offset)
typedef long long __v2di __attribute__ ((__vector_size__ (16)));
typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__));
-static
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs2 (void *__A, __m128i __B)
+static __inline__ __attribute__((always_inline)) void _mm_stream_si128_fs2 (void *__A, __m128i __B)
{
__asm__(".byte 0x64"); // fs prefix
__builtin_ia32_movntdq ((__v2di *)__A, (__v2di)__B);
}
-static
-__inline__ __attribute__((always_inline))
-void _mm_stream_si128_fs (void *__A, void *__B)
+static __inline__ __attribute__((always_inline)) void _mm_stream_si128_fs (void *__A, void *__B)
{
__m128i data;
data = (__m128i) __builtin_ia32_lddqu ((char const *)__B);
_mm_stream_si128_fs2 (__A, data);
}
-static
-__inline__ __attribute__((always_inline))
-void _mm_clflush_fs (void *__A)
+static __inline__ __attribute__((always_inline)) void _mm_clflush_fs (void *__A)
{
__asm__(".byte 0x64"); // fs prefix
__builtin_ia32_clflush (__A);
}
-static
-__inline__ __attribute__((always_inline))
-void _mm_mfence (void)
+static __inline __attribute__(( __always_inline__)) void _mm_mfence (void)
{
__builtin_ia32_mfence ();
}
-static
-__inline__ __attribute__((always_inline))
-void _mm_sfence (void)
+static __inline __attribute__(( __always_inline__)) void _mm_sfence (void)
{
__builtin_ia32_sfence ();
}
-#endif
-
-static
-__inline__ __attribute__((always_inline))
-void __stosb(unsigned char *dest, unsigned char data, size_t count)
-{
- __asm__ __volatile__ (
- "cld ; rep ; stosb "
- : "=D" (dest), "=c" (count)
- : "a"(data), "0"(dest), "1" (count)
- );
-}
+#endif /* __SSE3__ */
-static
-__inline__ __attribute__((always_inline))
-void __movsb(unsigned char *dest, unsigned char *data, size_t count)
-{
- __asm__ __volatile__ (
- "cld ; rep ; movsb "
- : "=D" (dest), "=S"(data), "=c" (count)
- : "S"(data), "0"(dest), "1" (count)
- );
-}
-
-static
-__inline__ __attribute__((always_inline))
-void debug_point ( unsigned short Port, unsigned long Data )
-{
- __outdword (Port, Data);
- __asm__ __volatile__ (".word 0xfeeb");
-
-}
-
-static
-__inline__ __attribute__((always_inline))
-void delay_point ( unsigned short Port, unsigned long Data, unsigned long delayTime )
-{
- UINTN Index;
- Index = 0;
- __outdword (Port, Data);
- while (Index < delayTime * 600000) {
- __outdword (0xE0, 0);
- Index ++;
- }
-}
-#endif // defined (__GNUC__)
+#endif /* defined (__GNUC__) */
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-09 19:59:58 +0000