diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main')
-rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c index 2cba133a66..3d80bafded 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Main/mmMemRestore.c @@ -59,6 +59,7 @@ #include "S3.h" #include "mfs3.h" #include "heapManager.h" +#include "cpuFeatures.h" #include "cpuRegisters.h" #include "cpuPostInit.h" #include "cpuApicUtilities.h" @@ -491,6 +492,14 @@ MemMContextRestore ( MemFeatMain.MemClr (MemMainPtr); } } + // Set LockDramCfg, which must be done after Memory Clear + for (Node = 0; Node < MemMainPtr->DieCount; Node ++) { + if (IsFeatureEnabled (C6Cstate, MemMainPtr->MemPtr->PlatFormConfig, &(MemMainPtr->MemPtr->StdHeader))) { + IDS_SKIP_HOOK (IDS_LOCK_DRAM_CFG, &NBArray[Node], &MemMainPtr->MemPtr->StdHeader) { + NBArray[Node].SetBitField (&NBArray[Node], BFLockDramCfg, 1); + } + } + } } else { RefPtr->MemRestoreCtl = FALSE; } |