aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/agesa/f15tn/Proc/CPU
diff options
context:
space:
mode:
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Proc/CPU')
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc10
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc22
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc19
-rw-r--r--src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc20
4 files changed, 71 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc
new file mode 100644
index 0000000000..50661a5b42
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/Makefile.inc
@@ -0,0 +1,10 @@
+libagesa-y += cpuCommonF15Utilities.c
+libagesa-y += cpuF15BrandId.c
+libagesa-y += cpuF15CacheDefaults.c
+libagesa-y += cpuF15Dmi.c
+libagesa-y += cpuF15MmioMap.c
+libagesa-y += cpuF15MsrTables.c
+libagesa-y += cpuF15PciTables.c
+libagesa-y += cpuF15PowerCheck.c
+libagesa-y += cpuF15Utilities.c
+libagesa-y += cpuF15WheaInitDataTables.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc
new file mode 100644
index 0000000000..7d52cb6dae
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/Makefile.inc
@@ -0,0 +1,22 @@
+libagesa-y += F15TnC6State.c
+libagesa-y += F15TnCpb.c
+libagesa-y += F15TnEquivalenceTable.c
+libagesa-y += F15TnInitEarlyTable.c
+libagesa-y += F15TnIoCstate.c
+libagesa-y += F15TnLogicalIdTables.c
+libagesa-y += F15TnMicrocodePatch0600110F_Enc.c
+libagesa-y += F15TnMicrocodePatchTables.c
+libagesa-y += F15TnMsrTables.c
+libagesa-y += F15TnPciTables.c
+libagesa-y += F15TnPowerMgmtSystemTables.c
+libagesa-y += F15TnPowerPlane.c
+libagesa-y += F15TnSharedMsrTable.c
+libagesa-y += F15TnUtilities.c
+libagesa-y += cpuF15TnCacheFlushOnHalt.c
+libagesa-y += cpuF15TnCoreAfterReset.c
+libagesa-y += cpuF15TnDmi.c
+libagesa-y += cpuF15TnHtc.c
+libagesa-y += cpuF15TnNbAfterReset.c
+libagesa-y += cpuF15TnPowerCheck.c
+libagesa-y += cpuF15TnPsi.c
+libagesa-y += cpuF15TnPstate.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc
new file mode 100644
index 0000000000..0e0bd6a08c
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/Makefile.inc
@@ -0,0 +1,19 @@
+libagesa-y += PreserveMailbox.c
+libagesa-y += cpuC6State.c
+libagesa-y += cpuCacheFlushOnHalt.c
+libagesa-y += cpuCacheInit.c
+libagesa-y += cpuCoreLeveling.c
+libagesa-y += cpuCpb.c
+libagesa-y += cpuDmi.c
+libagesa-y += cpuFeatureLeveling.c
+libagesa-y += cpuFeatures.c
+libagesa-y += cpuHtc.c
+libagesa-y += cpuHwC1e.c
+libagesa-y += cpuIoCstate.c
+libagesa-y += cpuPsi.c
+libagesa-y += cpuPstateGather.c
+libagesa-y += cpuPstateLeveling.c
+libagesa-y += cpuPstateTables.c
+libagesa-y += cpuSlit.c
+libagesa-y += cpuSrat.c
+libagesa-y += cpuWhea.c
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc
new file mode 100644
index 0000000000..239af76e98
--- /dev/null
+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Makefile.inc
@@ -0,0 +1,20 @@
+libagesa-y += S3.c
+libagesa-y += Table.c
+libagesa-y += cahalt.c
+libagesa-y += cahaltasm.S
+libagesa-y += cpuApicUtilities.c
+libagesa-y += cpuBist.c
+libagesa-y += cpuBrandId.c
+libagesa-y += cpuEarlyInit.c
+libagesa-y += cpuEventLog.c
+libagesa-y += cpuFamilyTranslation.c
+libagesa-y += cpuGeneralServices.c
+libagesa-y += cpuInitEarlyTable.c
+libagesa-y += cpuLateInit.c
+libagesa-y += cpuMicrocodePatch.c
+libagesa-y += cpuPostInit.c
+libagesa-y += cpuPowerMgmt.c
+libagesa-y += cpuPowerMgmtMultiSocket.c
+libagesa-y += cpuPowerMgmtSingleSocket.c
+libagesa-y += cpuWarmReset.c
+libagesa-y += heapManager.c