diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f15tn/Include')
-rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Include/Options.h | 29 | ||||
-rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h | 30 |
2 files changed, 30 insertions, 29 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/Options.h b/src/vendorcode/amd/agesa/f15tn/Include/Options.h index 9e4bdf20b8..467e654561 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/Options.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/Options.h @@ -64,34 +64,5 @@ typedef struct { IMAGE_ENTRY EntryPoint; ///< The corresponding entry point to call. } DISPATCH_TABLE; -#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE - #define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE) -#else - #define CFG_PLATFORM_POWER_POLICY_MODE (Performance) -#endif - -#ifdef BLDCFG_PCI_MMIO_BASE - #define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE) -#else - #define CFG_PCI_MMIO_BASE (0) -#endif - -#ifdef BLDCFG_PCI_MMIO_SIZE - #define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE) -#else - #define CFG_PCI_MMIO_SIZE (0) -#endif - -#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST - #define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST) -#else - #define CFG_AP_MTRR_SETTINGS_LIST (NULL) -#endif - -#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST - #define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST) -#else - #define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL) -#endif #endif // _OPTIONS_H_ diff --git a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h index cbf7ac6ade..7fcfd7ddf5 100644 --- a/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h +++ b/src/vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h @@ -2492,6 +2492,36 @@ CONST UINT32 ROMDATA AmdPlatformTypeCgf = CFG_AMD_PLATFORM_TYPE; #define CFG_DISPLAY_MISC_VBIOS_FAST_BOOT_ENABLE FALSE #endif +#ifdef BLDCFG_PLATFORM_POWER_POLICY_MODE + #define CFG_PLATFORM_POWER_POLICY_MODE (BLDCFG_PLATFORM_POWER_POLICY_MODE) +#else + #define CFG_PLATFORM_POWER_POLICY_MODE (Performance) +#endif + +#ifdef BLDCFG_PCI_MMIO_BASE + #define CFG_PCI_MMIO_BASE (BLDCFG_PCI_MMIO_BASE) +#else + #define CFG_PCI_MMIO_BASE (0) +#endif + +#ifdef BLDCFG_PCI_MMIO_SIZE + #define CFG_PCI_MMIO_SIZE (BLDCFG_PCI_MMIO_SIZE) +#else + #define CFG_PCI_MMIO_SIZE (0) +#endif + +#ifdef BLDCFG_AP_MTRR_SETTINGS_LIST + #define CFG_AP_MTRR_SETTINGS_LIST (BLDCFG_AP_MTRR_SETTINGS_LIST) +#else + #define CFG_AP_MTRR_SETTINGS_LIST (NULL) +#endif + +#ifdef BLDCFG_IOMMU_EXCLUSION_RANGE_LIST + #define CFG_IOMMU_EXCLUSION_RANGE_LIST (BLDCFG_IOMMU_EXCLUSION_RANGE_LIST) +#else + #define CFG_IOMMU_EXCLUSION_RANGE_LIST (NULL) +#endif + /*--------------------------------------------------------------------------- * Processing the options: Third, perform the option cross checks *--------------------------------------------------------------------------*/ |