aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c')
-rw-r--r--src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c
index 69d198b43c..d76a372630 100644
--- a/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c
+++ b/src/vendorcode/amd/agesa/f15/Proc/CPU/cpuMicrocodePatch.c
@@ -80,6 +80,7 @@ typedef union {
*----------------------------------------------------------------------------------------
*/
BOOLEAN
+STATIC
LoadMicrocode (
IN MICROCODE_PATCH *MicrocodePatchPtr,
IN OUT AMD_CONFIG_PARAMS *StdHeader
@@ -174,6 +175,7 @@ LoadMicrocodePatch (
*
*/
BOOLEAN
+STATIC
LoadMicrocode (
IN MICROCODE_PATCH *MicrocodePatchPtr,
IN OUT AMD_CONFIG_PARAMS *StdHeader
@@ -183,7 +185,7 @@ LoadMicrocode (
PATCH_LOADER PatchLoaderMsr;
// Load microcode patch into CPU
- PatchLoaderMsr.RawData = (UINT64) MicrocodePatchPtr;
+ PatchLoaderMsr.RawData = (UINT64) (UINTN) MicrocodePatchPtr;
PatchLoaderMsr.BitFields.SBZ = 0;
LibAmdMsrWrite (MSR_PATCH_LOADER, &PatchLoaderMsr.RawData, StdHeader);