diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c')
| -rw-r--r-- | src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c index 330a02e3d0..3821ac7110 100644 --- a/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c +++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/PCIe/Family/0x14/F14PcieWrapperServices.c @@ -263,12 +263,13 @@ PcieOnConfigureGppEnginesLaneAllocation ( CoreLaneIndex = 0; PortIdIndex = 0; do { + if (PortIdIndex > 0) EnginesList++; EnginesList->Flags &= ~DESCRIPTOR_ALLOCATED; EnginesList->Type.Port.PortId = GppPortIdConfigurationTable [ConfigurationId][PortIdIndex++]; EnginesList->Type.Port.StartCoreLane = GppLaneConfigurationTable [ConfigurationId][CoreLaneIndex++]; EnginesList->Type.Port.EndCoreLane = GppLaneConfigurationTable [ConfigurationId][CoreLaneIndex++]; - } while (IS_LAST_DESCRIPTOR (EnginesList++)); + } while (IS_LAST_DESCRIPTOR (EnginesList)); return AGESA_SUCCESS; } @@ -305,12 +306,13 @@ PcieOnConfigureDdiEnginesLaneAllocation ( } LaneIndex = 0; do { + if (LaneIndex > 0) EnginesList++; EnginesList->Flags &= ~DESCRIPTOR_ALLOCATED; EnginesList->EngineData.StartLane = DdiLaneConfigurationTable [ConfigurationId][LaneIndex++] + Wrapper->StartPhyLane; EnginesList->EngineData.EndLane = DdiLaneConfigurationTable [ConfigurationId][LaneIndex++] + Wrapper->StartPhyLane; - } while (IS_LAST_DESCRIPTOR (EnginesList++)); + } while (IS_LAST_DESCRIPTOR (EnginesList)); return AGESA_SUCCESS; } |