diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12')
5 files changed, 17 insertions, 309 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Include/ComalInstall.h b/src/vendorcode/amd/agesa/f12/Include/ComalInstall.h deleted file mode 100755 index 331ca11ba3..0000000000 --- a/src/vendorcode/amd/agesa/f12/Include/ComalInstall.h +++ /dev/null @@ -1,147 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Install of build options for a Comal platform solution - * - * This file generates the defaults tables for the "Comal" platform solution - * set of processors. The documented build options are imported from a user - * controlled file for processing. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Core - * @e \$Revision: 49803 $ @e \$Date: 2011-03-29 15:20:04 +0800 (Tue, 29 Mar 2011) $ - */ -/***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include "cpuRegisters.h" -#include "cpuFamRegisters.h" -#include "cpuFamilyTranslation.h" -#include "AdvancedApi.h" -#include "heapManager.h" -#include "CreateStruct.h" -#include "cpuFeatures.h" -#include "Table.h" -#include "CommonReturns.h" -#include "cpuEarlyInit.h" -#include "cpuLateInit.h" -#include "GnbInterface.h" - -/***************************************************************************** - * Define the RELEASE VERSION string - * - * The Release Version string should identify the next planned release. - * When a branch is made in preparation for a release, the release manager - * should change/confirm that the branch version of this file contains the - * string matching the desired version for the release. The trunk version of - * the file should always contain a trailing 'X'. This will make sure that a - * development build from trunk will not be confused for a released version. - * The release manager will need to remove the trailing 'X' and update the - * version string as appropriate for the release. The trunk copy of this file - * should also be updated/incremented for the next expected version, + trailing 'X' - ****************************************************************************/ - // This is the delivery package title, "TrinyPI " - // This string MUST be exactly 8 characters long -#define AGESA_PACKAGE_STRING {'T', 'r', 'i', 'n', 'y', 'P', 'I', ' '} - - // This is the release version number of the AGESA component - // This string MUST be exactly 12 characters long -#define AGESA_VERSION_STRING {'V', '0', '.', '0', '.', '6', '.', '0', 'X', ' ', ' ', ' '} - - -// The Comal solution is defined to be family 0x15 in the FS1 and FP2 sockets. -#define INSTALL_FS1_SOCKET_SUPPORT TRUE -#define INSTALL_FP2_SOCKET_SUPPORT TRUE -#define INSTALL_FAMILY_15_SUPPORT TRUE - -#ifdef BLDOPT_REMOVE_FS1_SOCKET_SUPPORT - #if BLDOPT_REMOVE_FS1_SOCKET_SUPPORT == TRUE - #undef INSTALL_FS1_SOCKET_SUPPORT - #define INSTALL_FS1_SOCKET_SUPPORT FALSE - #endif -#endif - -#ifdef BLDOPT_REMOVE_FP2_SOCKET_SUPPORT - #if BLDOPT_REMOVE_FP2_SOCKET_SUPPORT == TRUE - #undef INSTALL_FP2_SOCKET_SUPPORT - #define INSTALL_FP2_SOCKET_SUPPORT FALSE - #endif -#endif - - -// The following definitions specify the default values for various parameters in which there are -// no clearly defined defaults to be used in the common file. The values below are based on product -// and BKDG content, please consult the AGESA Memory team for consultation. -#define DFLT_SCRUB_DRAM_RATE (0) -#define DFLT_SCRUB_L2_RATE (0) -#define DFLT_SCRUB_L3_RATE (0) -#define DFLT_SCRUB_IC_RATE (0) -#define DFLT_SCRUB_DC_RATE (0) -#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED -#define DFLT_VRM_SLEW_RATE (5000) - - -#define DFLT_SMBUS0_BASE_ADDRESS 0xB00 -#define DFLT_SMBUS1_BASE_ADDRESS 0xB20 -#define DFLT_SIO_PME_BASE_ADDRESS 0xE00 -#define DFLT_ACPI_PM1_EVT_BLOCK_ADDRESS 0x400 -#define DFLT_ACPI_PM1_CNT_BLOCK_ADDRESS 0x404 -#define DFLT_ACPI_PM_TMR_BLOCK_ADDRESS 0x408 -#define DFLT_ACPI_CPU_CNT_BLOCK_ADDRESS 0x410 -#define DFLT_ACPI_GPE0_BLOCK_ADDRESS 0x420 -#define DFLT_SPI_BASE_ADDRESS 0xFEC10000 -#define DFLT_WATCHDOG_TIMER_BASE_ADDRESS 0xFEC00000 -#define DFLT_HPET_BASE_ADDRESS 0xFED00000 -#define DFLT_SMI_CMD_PORT 0xB0 -#define DFLT_ACPI_PMA_CNT_BLK_ADDRESS 0xFE00 -#define DFLT_GEC_BASE_ADDRESS 0xFED61000 -#define DFLT_AZALIA_SSID 0x780D1022 -#define DFLT_SMBUS_SSID 0x780B1022 -#define DFLT_IDE_SSID 0x780C1022 -#define DFLT_SATA_AHCI_SSID 0x78011022 -#define DFLT_SATA_IDE_SSID 0x78001022 -#define DFLT_SATA_RAID5_SSID 0x78031022 -#define DFLT_SATA_RAID_SSID 0x78021022 -#define DFLT_EHCI_SSID 0x78081022 -#define DFLT_OHCI_SSID 0x78071022 -#define DFLT_LPC_SSID 0x780E1022 -#define DFLT_FCH_GPP_LINK_CONFIG PortA4 -#define DFLT_FCH_GPP_PORT0_PRESENT FALSE -#define DFLT_FCH_GPP_PORT1_PRESENT FALSE -#define DFLT_FCH_GPP_PORT2_PRESENT FALSE -#define DFLT_FCH_GPP_PORT3_PRESENT FALSE -#define DFLT_FCH_GPP_PORT0_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE -// Instantiate all solution relevant data. -#include "PlatformInstall.h" - diff --git a/src/vendorcode/amd/agesa/f12/Include/DeccanInstall.h b/src/vendorcode/amd/agesa/f12/Include/DeccanInstall.h deleted file mode 100755 index d4c8ba5956..0000000000 --- a/src/vendorcode/amd/agesa/f12/Include/DeccanInstall.h +++ /dev/null @@ -1,132 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Install of build options for a Deccan platform solution - * - * This file generates the defaults tables for the "Deccan" platform solution - * set of processors. The documented build options are imported from a user - * controlled file for processing. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: Core - * @e \$Revision: 35276 $ @e \$Date: 2010-07-19 10:47:05 -0700 (Mon, 19 Jul 2010) $ - */ -/***************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ***************************************************************************/ - -#include "cpuRegisters.h" -#include "cpuFamRegisters.h" -#include "cpuFamilyTranslation.h" -#include "AdvancedApi.h" -#include "heapManager.h" -#include "CreateStruct.h" -#include "cpuFeatures.h" -#include "Table.h" -#include "CommonReturns.h" -#include "cpuEarlyInit.h" -#include "cpuLateInit.h" -#include "GnbInterface.h" - -/***************************************************************************** - * Define the RELEASE VERSION string - * - * The Release Version string should identify the next planned release. - * When a branch is made in preparation for a release, the release manager - * should change/confirm that the branch version of this file contains the - * string matching the desired version for the release. The trunk version of - * the file should always contain a trailing 'X'. This will make sure that a - * development build from trunk will not be confused for a released version. - * The release manager will need to remove the trailing 'X' and update the - * version string as appropriate for the release. The trunk copy of this file - * should also be updated/incremented for the next expected version, + trailing 'X' - ****************************************************************************/ - // This is the delivery package title, "KrishaPI" - // This string MUST be exactly 8 characters long -#define AGESA_PACKAGE_STRING {'K', 'r', 'i', 's', 'h', 'a', 'P', 'I'} - - // This is the release version number of the AGESA component - // This string MUST be exactly 12 characters long -#define AGESA_VERSION_STRING {'V', '0', '.', '0', '.', '3', '.', '0', 'X', ' ', ' ', ' '} - - -// The Deccan solution is defined to be family 0x14, models 10h-1fh in the FT2 socket. -#define INSTALL_FT2_SOCKET_SUPPORT TRUE -#define INSTALL_FAMILY_14_SUPPORT TRUE - - -// The following definitions specify the default values for various parameters in which there are -// no clearly defined defaults to be used in the common file. The values below are based on product -// and BKDG content, please consult the AGESA Memory team for consultation. -#define DFLT_SCRUB_DRAM_RATE (0) -#define DFLT_SCRUB_L2_RATE (0) -#define DFLT_SCRUB_L3_RATE (0) -#define DFLT_SCRUB_IC_RATE (0) -#define DFLT_SCRUB_DC_RATE (0) -#define DFLT_MEMORY_QUADRANK_TYPE QUADRANK_UNBUFFERED -#define DFLT_VRM_SLEW_RATE (5000) - - -#define DFLT_SMBUS0_BASE_ADDRESS 0xB00 -#define DFLT_SMBUS1_BASE_ADDRESS 0xB20 -#define DFLT_SIO_PME_BASE_ADDRESS 0xE00 -#define DFLT_ACPI_PM1_EVT_BLOCK_ADDRESS 0x400 -#define DFLT_ACPI_PM1_CNT_BLOCK_ADDRESS 0x404 -#define DFLT_ACPI_PM_TMR_BLOCK_ADDRESS 0x408 -#define DFLT_ACPI_CPU_CNT_BLOCK_ADDRESS 0x410 -#define DFLT_ACPI_GPE0_BLOCK_ADDRESS 0x420 -#define DFLT_SPI_BASE_ADDRESS 0xFEC10000 -#define DFLT_WATCHDOG_TIMER_BASE_ADDRESS 0xFEC00000 -#define DFLT_HPET_BASE_ADDRESS 0xFED00000 -#define DFLT_SMI_CMD_PORT 0xB0 -#define DFLT_ACPI_PMA_CNT_BLK_ADDRESS 0xFE00 -#define DFLT_GEC_BASE_ADDRESS 0xFED61000 -#define DFLT_AZALIA_SSID 0x780D1022 -#define DFLT_SMBUS_SSID 0x780B1022 -#define DFLT_IDE_SSID 0x780C1022 -#define DFLT_SATA_AHCI_SSID 0x78011022 -#define DFLT_SATA_IDE_SSID 0x78001022 -#define DFLT_SATA_RAID5_SSID 0x78031022 -#define DFLT_SATA_RAID_SSID 0x78021022 -#define DFLT_EHCI_SSID 0x78081022 -#define DFLT_OHCI_SSID 0x78071022 -#define DFLT_LPC_SSID 0x780E1022 -#define DFLT_FCH_GPP_LINK_CONFIG PortA4 -#define DFLT_FCH_GPP_PORT0_PRESENT FALSE -#define DFLT_FCH_GPP_PORT1_PRESENT FALSE -#define DFLT_FCH_GPP_PORT2_PRESENT FALSE -#define DFLT_FCH_GPP_PORT3_PRESENT FALSE -#define DFLT_FCH_GPP_PORT0_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT1_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT2_HOTPLUG FALSE -#define DFLT_FCH_GPP_PORT3_HOTPLUG FALSE -// Instantiate all solution relevant data. -#include "PlatformInstall.h" - diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h index fd8073837e..db4e7ad7ce 100755 --- a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h +++ b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h @@ -80,24 +80,18 @@ // Family 12h equates #define AMD_FAMILY_12_LN 0x0000000000000020ull -#define AMD_FAMILY_12 (AMD_FAMILY_12_LN) -#define AMD_FAMILY_LN (AMD_FAMILY_12_LN) +#define AMD_FAMILY_12 (AMD_FAMILY_12_LN) +#define AMD_FAMILY_LN (AMD_FAMILY_12_LN) // Family 14h equates #define AMD_FAMILY_14_ON 0x0000000000000040ull -#define AMD_FAMILY_ON (AMD_FAMILY_14_ON) -#define AMD_FAMILY_14_KR 0x0000000000000080ull -#define AMD_FAMILY_KR (AMD_FAMILY_14_KR) -#define AMD_FAMILY_14 (AMD_FAMILY_14_ON | AMD_FAMILY_14_KR) +#define AMD_FAMILY_14 (AMD_FAMILY_14_ON) +#define AMD_FAMILY_ON (AMD_FAMILY_14_ON) // Family 15h equates #define AMD_FAMILY_15_OR 0x0000000000000100ull #define AMD_FAMILY_OR (AMD_FAMILY_15_OR) -#define AMD_FAMILY_15_TN 0x0000000000000200ull -#define AMD_FAMILY_TN (AMD_FAMILY_15_TN) -#define AMD_FAMILY_15_KM 0x0000000000000400ull -#define AMD_FAMILY_KM (AMD_FAMILY_15_KM) -#define AMD_FAMILY_15 (AMD_FAMILY_15_OR | AMD_FAMILY_15_TN | AMD_FAMILY_15_KM) +#define AMD_FAMILY_15 (AMD_FAMILY_15_OR) // Family 16h equates #define AMD_FAMILY_16 0x0000000000000800ull @@ -203,11 +197,7 @@ #define AMD_F14_ON_Cx (AMD_F14_ON_C0) #define AMD_F14_ON_ALL (AMD_F14_ON_Ax | AMD_F14_ON_Bx | AMD_F14_ON_Cx) -#define AMD_F14_KR_Ax (AMD_F14_KR_A0 | AMD_F14_KR_A1) -#define AMD_F14_KR_Bx AMD_F14_KR_B0 -#define AMD_F14_KR_ALL (AMD_F14_KR_Ax | AMD_F14_KR_Bx) - -#define AMD_F14_ALL (AMD_F14_ON_ALL | AMD_F14_KR_ALL | AMD_F14_UNKNOWN) +#define AMD_F14_ALL (AMD_F14_ON_ALL | AMD_F14_UNKNOWN) // Family 15h CPU_LOGICAL_ID.Revision equates // ------------------------------------- @@ -227,10 +217,7 @@ #define AMD_F15_OR_LT_B1 (AMD_F15_OR_Ax | AMD_F15_OR_B0) #define AMD_F15_OR_ALL (AMD_F15_OR_Ax | AMD_F15_OR_Bx) -#define AMD_F15_TN_Ax (AMD_F15_TN_A0) -#define AMD_F15_TN_ALL (AMD_F15_TN_Ax) - -#define AMD_F15_ALL (AMD_F15_OR_ALL | AMD_F15_TN_ALL | AMD_F15_UNKNOWN) +#define AMD_F15_ALL (AMD_F15_OR_ALL | AMD_F15_UNKNOWN) // Family 16h CPU_LOGICAL_ID.Revision equates // TBD diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c index 8563d6e538..333f46c4eb 100755 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c +++ b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c @@ -192,7 +192,7 @@ PcieAlibBuildAcpiTable ( LibAmdMemCopy (AlibSsdtBuffer, &AlibSsdt[0], AlibSsdtlength, StdHeader); // Set PCI MMIO configuration // AmlObjName = '10DA'; - AmlObjName = 0x31304441; + AmlObjName = Int32FromChar ('1', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -211,7 +211,7 @@ PcieAlibBuildAcpiTable ( ASSERT (PpFuseArray != NULL); if (PpFuseArray != NULL) { // AmlObjName = '30DA'; - AmlObjName = 0x33304441; + AmlObjName = Int32FromChar ('3', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -226,7 +226,7 @@ PcieAlibBuildAcpiTable ( Gen1VidIndex = GnbLocateLowestVidIndex (StdHeader); BootUpVidIndex = GnbLocateHighestVidIndex (StdHeader); // AmlObjName = '40DA'; - AmlObjName = 0x34304441; + AmlObjName = Int32FromChar ('4', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -235,7 +235,7 @@ PcieAlibBuildAcpiTable ( AgesaStatus = AGESA_FATAL; } // AmlObjName = '50DA'; - AmlObjName = 0x35304441; + AmlObjName = Int32FromChar ('5', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -244,7 +244,7 @@ PcieAlibBuildAcpiTable ( AgesaStatus = AGESA_FATAL; } // AmlObjName = '01DA'; - AmlObjName = 0x30314441; + AmlObjName = Int32FromChar ('0', '1', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -255,7 +255,7 @@ PcieAlibBuildAcpiTable ( // Set PCIe configuration if (PcieLocateConfigurationData (StdHeader, &Pcie) == AGESA_SUCCESS) { // AmlObjName = '20DA'; - AmlObjName = 0x32304441; + AmlObjName = Int32FromChar ('2', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -264,7 +264,7 @@ PcieAlibBuildAcpiTable ( AgesaStatus = AGESA_FATAL; } // AmlObjName = '60DA'; - AmlObjName = 0x36304441; + AmlObjName = Int32FromChar ('6', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -278,7 +278,7 @@ PcieAlibBuildAcpiTable ( AgesaStatus = AGESA_FATAL; } // AmlObjName = '60DA'; - AmlObjName = 0x36304441; + AmlObjName = Int32FromChar ('6', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { @@ -292,7 +292,7 @@ PcieAlibBuildAcpiTable ( AgesaStatus = AGESA_FATAL; } // AmlObjName = '70DA'; - AmlObjName = 0x37304441; + AmlObjName = Int32FromChar ('7', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtBuffer, AlibSsdtlength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c index 630d688c5a..80095063c9 100755 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c +++ b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c @@ -110,7 +110,7 @@ PcieFmAlibBuildAcpiTable ( AgesaStatus = AGESA_SUCCESS; AltVddNbSupport = TRUE; // AmlObjName = 'A0DA'; - AmlObjName = 0x41304441; + AmlObjName = Int32FromChar ('A', '0', 'D', 'A'); AmlObjPtr = GnbLibFind (AlibSsdtPtr, ((ACPI_TABLE_HEADER*) &AlibSsdt[0])->TableLength, (UINT8*) &AmlObjName, sizeof (AmlObjName)); ASSERT (AmlObjPtr != NULL); if (AmlObjPtr != NULL) { |