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path: root/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
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Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c')
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
index ff6e673502..607fce0ec2 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
@@ -219,7 +219,7 @@ MemNCmnGetSetFieldLN (
LibAmdPciRead (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
(FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
- IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Value);
+ IDS_HDT_CONSOLE (MEM_GETREG, "~Fn%d_%03x = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Value);
}
} else if (Type == DCT_PHY_ACCESS) {
if (IsPhyDirectAccess && (NumOfInstances > 1)) {
@@ -251,7 +251,7 @@ MemNCmnGetSetFieldLN (
LibAmdPciWrite (AccessWidth32, PciAddr, &Value, &NBPtr->MemPtr->StdHeader);
if ((FieldName != BFDctAddlDataReg) && (FieldName != BFDctAddlOffsetReg) &&
(FieldName != BFDctExtraDataReg) && (FieldName != BFDctExtraOffsetReg)) {
- IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0xF, Address & 0xFFF, Highbit, Lowbit, Field);
+ IDS_HDT_CONSOLE (MEM_SETREG, "~Fn%d_%03x [%d:%d] = %x\n", (Address >> 12) & 0x7, Address & 0xFFF, Highbit, Lowbit, Field);
}
} else if (Type == DCT_PHY_ACCESS) {
MemNSetBitFieldNb (NBPtr, BFDctAddlDataReg, Value);