aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c')
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
index 9c52705725..ff6e673502 100644
--- a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
+++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c
@@ -159,7 +159,7 @@ MemNCmnGetSetFieldLN (
if (FieldName == BFDctAccessDone) {
// Llano does not support DctAccessDone. Assume DctAccessDone=1 always.
Value = 1;
- } else if ((FieldName < BFEndOfList) && (FieldName >= 0)) {
+ } else if (FieldName < BFEndOfList) {
Address = NBPtr->NBRegTable[FieldName];
if (Address) {
Lowbit = TSEFO_END (Address);