diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c')
| -rw-r--r-- | src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c index 40af8b9b35..c31d794ea0 100644 --- a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c +++ b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c @@ -25,7 +25,7 @@ * * Copyright (c) 2011, Advanced Micro Devices, Inc. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * Redistributions of source code must retain the above copyright @@ -33,10 +33,10 @@ * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE @@ -47,19 +47,19 @@ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * + * * *************************************************************************** * */ - + /*---------------------------------------------------------------------------------------- * M O D U L E S U S E D *---------------------------------------------------------------------------------------- */ - + #include "AGESA.h" #include "amdlib.h" -#include "Filecode.h" +#include "Filecode.h" /*---------------------------------------------------------------------------------------- * D E F I N I T I O N S A N D M A C R O S @@ -75,37 +75,37 @@ * P R O T O T Y P E S O F L O C A L F U N C T I O N S *---------------------------------------------------------------------------------------- */ - -VOID + +VOID MemUWriteCachelines ( IN UINT32 Address, IN UINT8 Pattern[], IN UINT16 ClCount ); - -VOID + +VOID MemUReadCachelines ( IN UINT8 Buffer[], IN UINT32 Address, IN UINT16 ClCount ); - + VOID MemUDummyCLRead ( IN UINT32 Address ); - -VOID + +VOID MemUMFenceInstr ( VOID ); - + VOID MemUFlushPattern ( IN UINT32 Address, IN UINT16 ClCount ); - + VOID AlignPointerTo16Byte ( IN OUT UINT8 **BufferPtrPtr @@ -115,7 +115,7 @@ AlignPointerTo16Byte ( * E X P O R T E D F U N C T I O N S *---------------------------------------------------------------------------------------- */ - + /*--------------------------------------------------------------------------------------- * L O C A L F U N C T I O N S *--------------------------------------------------------------------------------------- @@ -125,7 +125,7 @@ AlignPointerTo16Byte ( //---------------------------------------------------------------------------- -VOID +VOID MemUWriteCachelines ( IN UINT32 Address, IN UINT8 Pattern[], @@ -164,7 +164,7 @@ MemUWriteCachelines ( // Address - Physical address to be read // ClCount - number of cachelines to be read -VOID +VOID MemUReadCachelines ( IN UINT8 Buffer[], IN UINT32 Address, @@ -183,13 +183,13 @@ MemUReadCachelines ( //---------------------------------------------------------------------------- // MemUDummyCLRead: -// +// // Perform a single cache line read from a given physical address. -// +// // In: Address - Physical address to be read // ClCount - number of cachelines to be read -//FUNC_ATTRIBUTE (noinline) +//FUNC_ATTRIBUTE (noinline) VOID MemUDummyCLRead ( IN UINT32 Address @@ -201,7 +201,7 @@ MemUDummyCLRead ( //---------------------------------------------------------------------------- -VOID +VOID MemUMFenceInstr ( VOID ) @@ -211,13 +211,13 @@ MemUMFenceInstr ( //---------------------------------------------------------------------------- // MemUFlushPattern: -// +// // Flush a pattern of 72 bit times (per DQ) from cache. This procedure is used // to ensure cache miss on the next read training. -// +// // In: Address - Physical address to be flushed // ClCount - number of cachelines to be flushed -//FUNC_ATTRIBUTE(noinline) +//FUNC_ATTRIBUTE(noinline) VOID MemUFlushPattern ( IN UINT32 Address, @@ -238,7 +238,7 @@ MemUFlushPattern ( //---------------------------------------------------------------------------- -//FUNC_ATTRIBUTE(noinline) +//FUNC_ATTRIBUTE(noinline) VOID AlignPointerTo16Byte ( IN OUT UINT8 **BufferPtrPtr |