diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c')
-rwxr-xr-x | src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c | 164 |
1 files changed, 164 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c new file mode 100755 index 0000000000..419bc38ba0 --- /dev/null +++ b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c @@ -0,0 +1,164 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * Pre-training PCIe subsystem initialization routines. + * + * + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: GNB + * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ + * + */ +/* +***************************************************************************** +* +* Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* *************************************************************************** +* +*/ + +/*---------------------------------------------------------------------------------------- + * M O D U L E S U S E D + *---------------------------------------------------------------------------------------- + */ + +#include "AGESA.h" +#include "Ids.h" +#include "Gnb.h" +#include "GnbPcie.h" +#include "PcieLateInit.h" +#include "PcieFamilyServices.h" +#include "GnbCommonLib.h" +#include "GnbPcieInitLibV1.h" +#include "GnbPcieConfig.h" +#include "GnbRegistersLN.h" +#include "Filecode.h" +#define FILECODE PROC_GNB_PCIE_PCIELATEINIT_FILECODE +/*---------------------------------------------------------------------------------------- + * D E F I N I T I O N S A N D M A C R O S + *---------------------------------------------------------------------------------------- + */ + + +/*---------------------------------------------------------------------------------------- + * T Y P E D E F S A N D S T R U C T U R E S + *---------------------------------------------------------------------------------------- + */ + + +/*---------------------------------------------------------------------------------------- + * P R O T O T Y P E S O F L O C A L F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ +VOID +PciePwrPowerDownPllInL1 ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +AGESA_STATUS +PcieLateInitCallback ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN OUT VOID *Buffer, + IN PCIe_PLATFORM_CONFIG *Pcie + ); + +/*----------------------------------------------------------------------------------------*/ +/** + * Power down inactive lanes + * + * + * @param[in] Wrapper Pointer to wrapper config descriptor + * @param[in] Pcie Pointer to global PCIe configuration + */ + +VOID +PciePwrPowerDownPllInL1 ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN PCIe_PLATFORM_CONFIG *Pcie + ) +{ + + UINT32 LaneBitmapForPllOffInL1; + UINT8 PllPowerUpLatency; + IDS_HDT_CONSOLE (GNB_TRACE, "PciePwrPowerDownPllInL1 Enter\n"); + PllPowerUpLatency = PcieFmPifGetPllPowerUpLatency (Wrapper, Pcie); + LaneBitmapForPllOffInL1 = PcieLanesToPowerDownPllInL1 (PllPowerUpLatency, Wrapper, Pcie); + if (LaneBitmapForPllOffInL1 != 0) { + PcieFmPifSetPllModeForL1 (LaneBitmapForPllOffInL1, Wrapper, Pcie); + } + IDS_HDT_CONSOLE (GNB_TRACE, "PciePwrPowerDownPllInL1 Exit\n"); +} + + +/*----------------------------------------------------------------------------------------*/ +/** + * Per wrapper Pcie Late Init. + * + * + * @param[in] Wrapper Pointer to wrapper configuration descriptor + * @param[in] Buffer Pointer buffer + * @param[in] Pcie Pointer to global PCIe configuration + */ +AGESA_STATUS +PcieLateInitCallback ( + IN PCIe_WRAPPER_CONFIG *Wrapper, + IN OUT VOID *Buffer, + IN PCIe_PLATFORM_CONFIG *Pcie + ) +{ + PciePwrPowerDownUnusedLanes (Wrapper, Pcie); + PciePwrPowerDownPllInL1 (Wrapper, Pcie); + PciePwrClockGating (Wrapper, Pcie); + PcieLockRegisters (Wrapper, Pcie); + return AGESA_SUCCESS; +} + +/*----------------------------------------------------------------------------------------*/ +/** + * Pcie Late Init + * + * Late PCIe initialization + * + * @param[in] Pcie Pointer to global PCIe configuration + * @retval AGESA_SUCCESS Topology successfully mapped + * @retval AGESA_ERROR Topology can not be mapped + */ + +AGESA_STATUS +PcieLateInit ( + IN PCIe_PLATFORM_CONFIG *Pcie + ) +{ + AGESA_STATUS Status; + IDS_HDT_CONSOLE (GNB_TRACE, "PcieLateInit Enter\n"); + Status = PcieConfigRunProcForAllWrappers (DESCRIPTOR_ALL_WRAPPERS, PcieLateInitCallback, NULL, Pcie); + IDS_HDT_CONSOLE (GNB_TRACE, "PcieLateInit Exit [0x%x]\n", Status); + return Status; +} |