diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/GNB/Nb')
32 files changed, 0 insertions, 8479 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c deleted file mode 100644 index 5034ed535f..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c +++ /dev/null @@ -1,347 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * LCLK DPM initialization - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 39007 $ @e \$Date: 2010-10-05 00:32:54 +0800 (Tue, 05 Oct 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "heapManager.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbPcie.h" -#include "GnbCommonLib.h" -#include "GnbPcieConfig.h" -#include "GnbRegistersLN.h" -#include "OptionGnb.h" -#include "GfxLib.h" -#include "NbConfigData.h" -#include "NbSmuLib.h" -#include "NbLclkDpm.h" -#include "NbFamilyServices.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_FAMILY_LN_F12NBLCLKDPM_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -extern GNB_BUILD_OPTIONS GnbBuildOptions; -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -UINT32 LclkDpmCacTable [] = { - 0x0, - 0x0, - 0x0, - 0x0 -}; - -UINT32 LclkDpmActivityThresholdTable [] = { - 0x100, - 0x40FFFF, - 0x40FFFF, - 0x0 -}; - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*----------------------------------------------------------------------------------------*/ -/** - * Init NB LCLK DPM in Root Complex Activity mode - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval Initialization status - */ - -AGESA_STATUS -NbFmInitLclkDpmRcActivity ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - PP_FUSE_ARRAY *PpFuseArray; - INT8 Index; - UINTN LclkState; - Status = AGESA_SUCCESS; - IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F12 Enter\n"); - PpFuseArray = GnbLocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, StdHeader); - if (PpFuseArray != NULL) { - UINT32 ActivityThreshold [8]; - UINT16 SamplingPeriod [10]; - UINT8 LclkScalingDid [4]; - UINT8 LclkScalingVid [4]; - UINT32 LclkDpmValid; - UINT32 MainPllVcoKHz; - LibAmdMemFill (&ActivityThreshold[0], 0, sizeof (ActivityThreshold), StdHeader); - LibAmdMemFill (&SamplingPeriod[0], 0, sizeof (SamplingPeriod), StdHeader); - MainPllVcoKHz = GfxLibGetMainPllFreq (StdHeader) * 100; - LclkDpmValid = 0; - LclkState = 7; - for (Index = 3; Index >= 0; Index--) { - if (PpFuseArray->LclkDpmValid [Index] != 0) { - // Set valid DPM state - LclkDpmValid |= (1 << (LclkState)); - // Set LCLK scaling DID - LclkScalingDid [7 - LclkState] = PpFuseArray->LclkDpmDid [Index]; - // Set LCLK scaling VID - LclkScalingVid [7 - LclkState] = PpFuseArray->LclkDpmVid [Index]; - // Set sampling period - SamplingPeriod [LclkState] = 0xC350; - // Changed from 0xC350 to 0x1388 for DPM 0 - if (Index == 0) { - SamplingPeriod [LclkState] = 0x1388; - } - // Set activity threshold from BKDG: - // Raising -- ActivityThreshold [LclkState] = ((102 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) - 10) / 10; - // Lowering -- ActivityThreshold [LclkState] |= (((407 * (GfxLibCalculateClk (LclkScalingDid [7 - LclkState], MainPllVcoKHz) / 100)) + 99) / 10) << 16; - // For ON specific enable LCLK DPM : - ActivityThreshold [LclkState] = LclkDpmActivityThresholdTable [Index]; - - IDS_HDT_CONSOLE (GNB_TRACE, "Fused State Index:%d LCLK DPM State [%d]: LclkScalingDid - 0x%x, ActivityThreshold - 0x%x, SamplingPeriod - 0x%x\n", - Index, LclkState, LclkScalingDid [7 - LclkState], ActivityThreshold [LclkState], SamplingPeriod [LclkState] - ); - LclkState--; - } - } - if (LclkState != 7) { - SMUx33_STRUCT SMUx33; - SMUx0B_x8434_STRUCT SMUx0B_x8434; - FCRxFF30_01E4_STRUCT FCRxFF30_01E4; - UINT8 CurrentUnit; - UINT16 FinalUnit; - UINT16 FinalPeriod; - UINT32 Freq; - UINT32 FreqDelta; - UINT32 Value; - ASSERT (LclkScalingDid [0] != 0); - FreqDelta = 0xffffffff; - FinalPeriod = 0; - FinalUnit = 0; - Freq = (65535 * 100 * 100) / GfxLibCalculateClk (LclkScalingDid [0], MainPllVcoKHz); - for (CurrentUnit = 0; CurrentUnit < 16; CurrentUnit++) { - UINT32 CurrentFreqDelta; - UINT32 CurrentPeriod; - UINT32 Temp; - Temp = GnbLibPowerOf (4, CurrentUnit); - CurrentPeriod = Freq / Temp; - if (CurrentPeriod <= 0xFFFF) { - CurrentFreqDelta = Freq - Temp * CurrentPeriod; - if (FreqDelta > CurrentFreqDelta) { - FinalUnit = CurrentUnit; - FinalPeriod = (UINT16) CurrentPeriod; - FreqDelta = CurrentFreqDelta; - } - } - } - //Process to enablement LCLK DPM States - NbSmuIndirectRead (SMUx33_ADDRESS, AccessWidth32, &SMUx33.Value, StdHeader); - SMUx33.Field.BusyCntSel = 0x3; - SMUx33.Field.LclkActMonUnt = FinalUnit; - SMUx33.Field.LclkActMonPrd = FinalPeriod; - NbSmuIndirectWrite (SMUx33_ADDRESS, AccessS3SaveWidth32, &SMUx33.Value, StdHeader); - SMUx0B_x8434.Value = 0; - SMUx0B_x8434.Field.LclkDpmType = 0x1; - SMUx0B_x8434.Field.LclkDpmEn = 0x1; - SMUx0B_x8434.Field.LclkTimerPeriod = 0x0C350; - SMUx0B_x8434.Field.LclkTimerPrescalar = 0x1; - NbSmuRcuRegisterWrite ( - SMUx0B_x8434_ADDRESS, - &SMUx0B_x8434.Value, - 1, - TRUE, - StdHeader - ); - // Set CAC Credits - NbSmuRcuRegisterWrite ( - SMUx0B_x84AC_ADDRESS, - &LclkDpmCacTable[0], - sizeof (LclkDpmCacTable) / sizeof (UINT32), - TRUE, - StdHeader - ); - // Program activity threshold - IDS_HDT_CONSOLE (GNB_TRACE, "ActivityThreshold[4] - 0x%x ActivityThreshold[5] - 0x%x ActivityThreshold[6] - 0x%x ActivityThreshold[7] - 0x%x\n", - ActivityThreshold[4], ActivityThreshold[5], ActivityThreshold[6], ActivityThreshold [7] - ); - NbSmuRcuRegisterWrite ( - SMUx0B_x8470_ADDRESS, - &ActivityThreshold[4], - 4, - TRUE, - StdHeader - ); - // Program sampling period - for (Index = 0; Index < (sizeof (SamplingPeriod) / sizeof (SamplingPeriod[0])); Index = Index + 2) { - UINT16 Temp; - Temp = SamplingPeriod[Index]; - SamplingPeriod[Index] = SamplingPeriod[Index + 1]; - SamplingPeriod[Index + 1] = Temp; - } - IDS_HDT_CONSOLE (GNB_TRACE, "SamplingPeriod[4] - 0x%x SamplingPeriod[5] - 0x%x SamplingPeriod[6] - 0x%x SamplingPeriod[7] - 0x%x \n", - SamplingPeriod[4], SamplingPeriod[5], SamplingPeriod[6], SamplingPeriod[7] - ); - NbSmuRcuRegisterWrite ( - SMUx0B_x8440_ADDRESS, - (UINT32*) &SamplingPeriod[4], - 2, - TRUE, - StdHeader - ); - // Program LCK scaling DID - NbSmuRcuRegisterWrite ( - SMUx0B_x848C_ADDRESS, - (UINT32*) &LclkScalingDid[0], - 1, - TRUE, - StdHeader - ); - // Program LCK scaling VID - NbSmuRcuRegisterWrite ( - SMUx0B_x8498_ADDRESS, - (UINT32*) &LclkScalingVid[0], - 1, - TRUE, - StdHeader - ); - // Program valid LCLK DPM states - LclkDpmValid = NbFmDpmStateBootupInit (LclkDpmValid, StdHeader); - NbSmuRcuRegisterWrite ( - SMUx0B_x8490_ADDRESS, - &LclkDpmValid, - 1, - TRUE, - StdHeader - ); - //Setup Activity Monitor Coefficients - Value = (0x24 << SMUx35_DownTrendCoef_OFFSET) | (0x24 << SMUx35_UpTrendCoef_OFFSET); - NbSmuIndirectWrite (SMUx35_ADDRESS, AccessS3SaveWidth32, &Value, StdHeader); - Value = (0x22 << SMUx35_DownTrendCoef_OFFSET) | (0x22 << SMUx35_UpTrendCoef_OFFSET); - for (Index = SMUx37_ADDRESS; Index <= SMUx51_ADDRESS; Index = Index + 2) { - NbSmuIndirectWrite (Index, AccessS3SaveWidth32, &Value, StdHeader); - } - // Enable LCLK DPM as voltage client - NbSmuSrbmRegisterRead (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, StdHeader); - FCRxFF30_01E4.Field.VoltageChangeEn = 0x1; - NbSmuSrbmRegisterWrite (FCRxFF30_01E4_ADDRESS, &FCRxFF30_01E4.Value, TRUE, StdHeader); - // Start LCLK service - NbSmuServiceRequest (0x8, TRUE, StdHeader); - } - } else { - IDS_HDT_CONSOLE (GNB_TRACE, " ERROR! Cannot locate fuse table\n"); - Status = AGESA_ERROR; - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbFmInitLclkDpmRcActivity F12 Exit [0x%x]\n", Status); - return Status; -} - - - -/*----------------------------------------------------------------------------------------*/ -/** - * Family specific check PsppPolicy to initially enable appropriate DPM states - * - * - * @param[in] LclkDpmValid UINT32 Lclk Dpm Valid - * @param[in] StdHeader Pointer to AMD_CONFIG_PARAMS - */ -UINT32 -NbFmDpmStateBootupInit ( - IN UINT32 LclkDpmValid, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - PCIe_PLATFORM_CONFIG *Pcie; - UINT32 LclkDpmValidState; - UINT8 Dpm0ValidOffset; - - if ((LclkDpmValid & 0xFF) == 0) { - IDS_HDT_CONSOLE (NB_MISC, " No valid DPM State Bootup Init\n"); - return 0; - } - - // For LN, from DPM0(the most right non-zero bit) to highest DPM(bit 7) - Dpm0ValidOffset = LibAmdBitScanForward (LclkDpmValid & 0xFF); - // Enable DPM0 - LclkDpmValidState = 1 << Dpm0ValidOffset; - - if (PcieLocateConfigurationData (StdHeader, &Pcie) == AGESA_SUCCESS) { - switch (Pcie->PsppPolicy) { - case PsppDisabled: - case PsppPerformance: - case PsppBalanceHigh: - if ((Dpm0ValidOffset + 2) <= 7) { - // Enable DPM0 + DPM2 - LclkDpmValidState = LclkDpmValidState + (1 << (Dpm0ValidOffset + 2)); - } - break; - case PsppBalanceLow: - if ((Dpm0ValidOffset + 1) <= 7) { - // Enable DPM0 + DPM1 - LclkDpmValidState = LclkDpmValidState + (1 << (Dpm0ValidOffset + 1)); - } - break; - case PsppPowerSaving: - // Enable DPM0 - break; - default: - ASSERT (FALSE); - } - } else { - IDS_HDT_CONSOLE (NB_MISC, " DPM State Bootup Init Pcie Locate ConfigurationData Fail!! -- Enable DPM0 only\n"); - } - return LclkDpmValidState; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c deleted file mode 100644 index 7611473b97..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c +++ /dev/null @@ -1,600 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB Power gate Gfx/Uvd/Gmc - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "heapManager.h" -#include "Gnb.h" -#include "GnbGfx.h" -#include "GnbPcie.h" -#include "GnbFuseTable.h" -#include "GnbCommonLib.h" -#include "GnbGfxInitLibV1.h" -#include "GnbRegistersLN.h" -#include "GfxLib.h" -#include "NbSmuLib.h" -#include "NbConfigData.h" -#include "NbFamilyServices.h" -#include "F12NbPowerGate.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_FAMILY_LN_F12NBPOWERGATE_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ -#define POWER_GATE_GMC_PSO_CONTROL_VALID_NUM 1 -#define POWER_GATE_GMC_MOTH_PSO_PWRUP 153 -#define POWER_GATE_GMC_MOTH_PSO_PWRDN 50 -#define POWER_GATE_GMC_DAUG_PSO_PWRUP 50 -#define POWER_GATE_GMC_DAUG_PSO_PWRDN 0 -#define POWER_GATE_GMC_RESET_TIMER 10 -#define POWER_GATE_GMC_ISO_TIMER 10 - -#define POWER_GATE_UVD_MOTH_PSO_PWRUP 113 -#define POWER_GATE_UVD_MOTH_PSO_PWRDN 50 -#define POWER_GATE_UVD_DAUG_PSO_PWRUP 50 -#define POWER_GATE_UVD_DAUG_PSO_PWRDN 50 -#define POWER_GATE_UVD_RESET_TIMER 50 -#define POWER_GATE_UVD_ISO_TIMER 50 - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -POWER_GATE_DATA F12NbGmcPowerGatingData = { - POWER_GATE_GMC_MOTH_PSO_PWRUP, - POWER_GATE_GMC_MOTH_PSO_PWRDN, - POWER_GATE_GMC_DAUG_PSO_PWRUP, - POWER_GATE_GMC_DAUG_PSO_PWRDN, - POWER_GATE_GMC_RESET_TIMER, - POWER_GATE_GMC_ISO_TIMER -}; - -/// GMC power gating -UINT32 F12GmcPowerGatingTable_1[] = { -// SMUx0B_x8408_ADDRESS - 0, -// SMUx0B_x840C_ADDRESS - 0, -// SMUx0B_x8410_ADDRESS - (0x1 << SMUx0B_x8410_PwrGatingEn_OFFSET) | - (0x0 << SMUx0B_x8410_Reserved_2_1_OFFSET) | - (POWER_GATE_GMC_PSO_CONTROL_VALID_NUM << SMUx0B_x8410_PsoControlValidNum_OFFSET) | - (0x0 << SMUx0B_x8410_PwrGaterSel_OFFSET) -}; - -/*----------------------------------------------------------------------------------------*/ -/** - * GMC Power Gating - * - * - * @param[in] StdHeader Standard Configuration Header - * @param[in] PowerGateData Pointer power gate data - * @retval AGESA_STATUS - */ - -AGESA_STATUS -STATIC -F12NbSmuGmcPowerGatingInit ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN POWER_GATE_DATA *PowerGateData - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGmcPowerGatingInit Enter\n"); - NbSmuRcuRegisterWrite ( - SMUx0B_x8408_ADDRESS, - &F12GmcPowerGatingTable_1[0], - sizeof (POWER_GATE_DATA) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuRcuRegisterWrite ( - SMUx0B_x84A0_ADDRESS, - (UINT32 *) PowerGateData, - sizeof (POWER_GATE_DATA) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuServiceRequest (0x01, TRUE, StdHeader); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGmcPowerGatingInit Exit\n"); - return AGESA_SUCCESS; -} - - -POWER_GATE_DATA F12NbUvdPowerGatingData = { - POWER_GATE_UVD_MOTH_PSO_PWRUP, - POWER_GATE_UVD_MOTH_PSO_PWRDN, - POWER_GATE_UVD_DAUG_PSO_PWRUP, - POWER_GATE_UVD_DAUG_PSO_PWRDN, - POWER_GATE_UVD_RESET_TIMER, - POWER_GATE_UVD_ISO_TIMER -}; - -/// UVD power gating -UINT32 F12UvdPowerGatingTable_1[] = { -// SMUx0B_x8408_ADDRESS - 0, -// SMUx0B_x840C_ADDRESS - 0, -// SMUx0B_x8410_ADDRESS - (0x0 << SMUx0B_x8410_PwrGatingEn_OFFSET) | - (0x0 << SMUx0B_x8410_Reserved_2_1_OFFSET) | - (0x1 << SMUx0B_x8410_PsoControlValidNum_OFFSET) | - (0x2 << SMUx0B_x8410_PwrGaterSel_OFFSET) -}; - - -/*----------------------------------------------------------------------------------------*/ -/** - * UVD Power Gating - * - * - * - * @param[in] StdHeader Standard Configuration Header - * @param[in] PowerGateData Pointer power gate data - * - */ - - -VOID -STATIC -F12NbSmuUvdPowerGatingInit ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN POWER_GATE_DATA *PowerGateData - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuUvdPowerGatingInit Enter\n"); - NbSmuRcuRegisterWrite ( - SMUx0B_x8408_ADDRESS, - &F12UvdPowerGatingTable_1[0], - sizeof (F12UvdPowerGatingTable_1) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuRcuRegisterWrite ( - SMUx0B_x84A0_ADDRESS, - (UINT32 *) PowerGateData, - sizeof (POWER_GATE_DATA) / sizeof (UINT32), - TRUE, - StdHeader - ); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuUvdPowerGatingInit Exit\n"); - NbSmuServiceRequest (0x01, TRUE, StdHeader); -} - - - -/*----------------------------------------------------------------------------------------*/ -/** - * UVD Power Shutdown - * - * - * - * @param[in] StdHeader Standard Configuration Header - */ - - -VOID -STATIC -F12NbSmuUvdShutdown ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuUvdShutdown Enter\n"); - NbSmuServiceRequest (0x03, TRUE, StdHeader); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuUvdShutdown Exit\n"); -} - - -/// GMC shutdown table -UINT32 F12SmuGmcShutdownTable_1[] = { -// SMUx0B_x8600_ADDRESS, - (0x3 << SMUx0B_x8600_TransactionCount_OFFSET) | - (0x8650 << SMUx0B_x8600_MemAddr_7_0__OFFSET), -// SMUx0B_x8604_ADDRESS, - (0xFE << SMUx0B_x8604_Txn1MBusAddr_31_24__OFFSET) | - (0x60 << SMUx0B_x8604_Txn1MBusAddr_23_16__OFFSET) | - (0x14 << SMUx0B_x8604_Txn1TransferLength_7_0__OFFSET), -// SMUx0B_x8608_ADDRESS, - (0x03ull << SMUx0B_x8608_Txn1Tsize_OFFSET) | - (0x01ull << SMUx0B_x8608_Txn1Overlap_OFFSET) | - (0x01ull << SMUx0B_x8608_Txn1Mode_OFFSET) | - (0x07ull << SMUx0B_x8608_Txn2Mbusaddr70_OFFSET), -// SMUx0B_x860C_ADDRESS, - (0xFE << SMUx0B_x860C_Txn2MBusAddr3124_OFFSET) | - (0x60 << SMUx0B_x860C_Txn2MBusAddr2316_OFFSET) | - (0x4 << SMUx0B_x860C_Txn2TransferLength70_OFFSET) | - (0x3 << SMUx0B_x860C_Txn2Tsize_OFFSET), -// SMUx0B_x8610_ADDRESS, - (0x1 << SMUx0B_x8610_Txn2Overlap_OFFSET) | - (0x1 << SMUx0B_x8610_Txn2Mode_OFFSET) | - (0x60 << SMUx0B_x8610_Txn3MBusAddr2316_OFFSET) | - (0x6 << SMUx0B_x8610_Txn3MBusAddr70_OFFSET), -// SMUx0B_x8614_ADDRESS, - (0xFEull << SMUx0B_x8614_Txn3MBusAddr3124_OFFSET) | - (0x04ull << SMUx0B_x8614_Txn3TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x8614_Txn3Tsize_OFFSET) | - (0x01ull << SMUx0B_x8614_Txn3Mode_OFFSET), -}; - -UINT32 F12SmuGmcShutdownTable_2[] = { -// SMUx0B_x8650_ADDRESS, - 0x76543210, -// SMUx0B_x8654_ADDRESS, - 0xFEDCBA98, -// SMUx0B_x8658_ADDRESS, - 0x8, -// SMUx0B_x865C_ADDRESS, - 0x00320032, -// SMUx0B_x8660_ADDRESS, - 0x00100010, -// SMUx0B_x8664_ADDRESS, - 0x00320032, -// SMUx0B_x866C_ADDRESS, - 0x00 -}; - -/*----------------------------------------------------------------------------------------*/ -/** - * Shutdown GMC - * - * - * - * @param[in] StdHeader Standard Configuration Header - */ - -VOID -STATIC -F12NbSmuGmcShutdown ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGmcShutdown Enter\n"); - NbSmuRcuRegisterWrite ( - SMUx0B_x8600_ADDRESS, - &F12SmuGmcShutdownTable_1[0], - sizeof (F12SmuGmcShutdownTable_1) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuRcuRegisterWrite ( - SMUx0B_x8650_ADDRESS, - &F12SmuGmcShutdownTable_2[0], - sizeof (F12SmuGmcShutdownTable_2) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuServiceRequest (0x0B, TRUE, StdHeader); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGmcShutdown Exit\n"); -} - -/// GFX shutdown table -UINT32 F12SmuGfxShutdownTable_1[] = { -// SMUx0B_x8600_ADDRESS, - (0x09ull << SMUx0B_x8600_TransactionCount_OFFSET) | - (0x8650ull << SMUx0B_x8600_MemAddr_7_0__OFFSET) | - (0x00ull << SMUx0B_x8600_Txn1MBusAddr_7_0__OFFSET), -// SMUx0B_x8604_ADDRESS, - (0xFEull << SMUx0B_x8604_Txn1MBusAddr_31_24__OFFSET) | - (0x70ull << SMUx0B_x8604_Txn1MBusAddr_23_16__OFFSET) | - (0x00ull << SMUx0B_x8604_Txn1MBusAddr_15_8__OFFSET) | - (0x14ull << SMUx0B_x8604_Txn1TransferLength_7_0__OFFSET), -// SMUx0B_x8608_ADDRESS, - (0x03ull << SMUx0B_x8608_Txn1Tsize_OFFSET) | - (0x00ull << SMUx0B_x8608_Txn1TransferLength_13_8__OFFSET) | - (0x00ull << SMUx0B_x8608_Txn1Spare_OFFSET) | - (0x01ull << SMUx0B_x8608_Txn1Overlap_OFFSET) | - (0x00ull << SMUx0B_x8608_Txn1Static_OFFSET) | - (0x01ull << SMUx0B_x8608_Txn1Mode_OFFSET) | - (0x00ull << SMUx0B_x8608_Txn2Mbusaddr158_OFFSET) | - (0x07ull << SMUx0B_x8608_Txn2Mbusaddr70_OFFSET), -// SMUx0B_x860C_ADDRESS, - (0xFEull << SMUx0B_x860C_Txn2MBusAddr3124_OFFSET) | - (0x70ull << SMUx0B_x860C_Txn2MBusAddr2316_OFFSET) | - (0x04ull << SMUx0B_x860C_Txn2TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x860C_Txn2Tsize_OFFSET) | - (0x00ull << SMUx0B_x860C_Txn2TransferLength138_OFFSET), -// SMUx0B_x8610_ADDRESS, - (0x00ull << SMUx0B_x8610_Txn2Spare_OFFSET) | - (0x01ull << SMUx0B_x8610_Txn2Overlap_OFFSET) | - (0x00ull << SMUx0B_x8610_Txn2Static_OFFSET) | - (0x01ull << SMUx0B_x8610_Txn2Mode_OFFSET) | - (0x70ull << SMUx0B_x8610_Txn3MBusAddr2316_OFFSET) | - (0x00ull << SMUx0B_x8610_Txn3MBusAddr158_OFFSET) | - (0x06ull << SMUx0B_x8610_Txn3MBusAddr70_OFFSET), -// SMUx0B_x8614_ADDRESS, - (0xFEull << SMUx0B_x8614_Txn3MBusAddr3124_OFFSET) | - (0x04ull << SMUx0B_x8614_Txn3TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x8614_Txn3Tsize_OFFSET) | - (0x00ull << SMUx0B_x8614_Txn3TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x8614_Txn3Spare_OFFSET) | - (0x00ull << SMUx0B_x8614_Txn3Overlap_OFFSET) | - (0x00ull << SMUx0B_x8614_Txn3Static_OFFSET) | - (0x01ull << SMUx0B_x8614_Txn3Mode_OFFSET), -// SMUx0B_x8618_ADDRESS, - (0xFEull << SMUx0B_x8618_Txn4MBusAddr3124_OFFSET) | - (0xA0ull << SMUx0B_x8618_Txn4MBusAddr2316_OFFSET) | - (0x00ull << SMUx0B_x8618_Txn4MBusAddr158_OFFSET) | - (0x00ull << SMUx0B_x8618_Txn4MBusAddr70_OFFSET), -// SMUx0B_x861C_ADDRESS, - (0x07ull << SMUx0B_x861C_Txn5Mbusaddr70_OFFSET) | - (0x14ull << SMUx0B_x861C_Txn4TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x861C_Txn4Tsize_OFFSET) | - (0x00ull << SMUx0B_x861C_Txn4TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x861C_Txn4Spare_OFFSET) | - (0x01ull << SMUx0B_x861C_Txn4Overlap_OFFSET) | - (0x00ull << SMUx0B_x861C_Txn4Static_OFFSET) | - (0x01ull << SMUx0B_x861C_Txn4Mode_OFFSET), -// SMUx0B_x8620_ADDRESS, - (0x00ull << SMUx0B_x8620_Txn5MBusAddr158_OFFSET) | - (0xA0ull << SMUx0B_x8620_Txn5MBusAddr2316_OFFSET) | - (0xFEull << SMUx0B_x8620_Txn5MBusAddr3124_OFFSET) | - (0x04ull << SMUx0B_x8620_Txn5TransferLength70_OFFSET), -// SMUx0B_x8624_ADDRESS, - (0x03ull << SMUx0B_x8624_Txn5Tsize_OFFSET) | - (0x00ull << SMUx0B_x8624_Txn5TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x8624_Txn5Spare_OFFSET) | - (0x01ull << SMUx0B_x8624_Txn5Overlap_OFFSET) | - (0x00ull << SMUx0B_x8624_Txn5Static_OFFSET) | - (0x01ull << SMUx0B_x8624_Txn5Mode_OFFSET) | - (0x00ull << SMUx0B_x8624_Txn6MBusAddr158_OFFSET) | - (0x06ull << SMUx0B_x8624_Txn6MBusAddr70_OFFSET), -// SMUx0B_x8628_ADDRESS, - (0xFEull << SMUx0B_x8628_Txn6MBusAddr3124_OFFSET) | - (0xA0ull << SMUx0B_x8628_Txn6MBusAddr2316_OFFSET) | - (0x04ull << SMUx0B_x8628_Txn6TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x8628_Txn6Tsize_OFFSET) | - (0x00ull << SMUx0B_x8628_Txn6TransferLength138_OFFSET), -// SMUx0B_x862C_ADDRESS, - (0xB0ull << SMUx0B_x862C_Txn7MBusAddr2316_OFFSET) | - (0x00ull << SMUx0B_x862C_Txn7MBusAddr158_OFFSET) | - (0x00ull << SMUx0B_x862C_Txn7MBusAddr70_OFFSET) | - (0x00ull << SMUx0B_x862C_Txn6Spare_OFFSET) | - (0x00ull << SMUx0B_x862C_Txn6Overlap_OFFSET) | - (0x00ull << SMUx0B_x862C_Txn6Static_OFFSET) | - (0x01ull << SMUx0B_x862C_Txn6Mode_OFFSET), -// SMUx0B_x8630_ADDRESS, - (0xFEull << SMUx0B_x8630_Txn7MBusAddr3124_OFFSET) | - (0x14ull << SMUx0B_x8630_Txn7TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x8630_Txn7Tsize_OFFSET) | - (0x00ull << SMUx0B_x8630_Txn7TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x8630_Txn7Spare_OFFSET) | - (0x01ull << SMUx0B_x8630_Txn7Overlap_OFFSET) | - (0x00ull << SMUx0B_x8630_Txn7Static_OFFSET) | - (0x01ull << SMUx0B_x8630_Txn7Mode_OFFSET), -// SMUx0B_x8634_ADDRESS, - (0xFEull << SMUx0B_x8634_Txn8MBusAddr3124_OFFSET) | - (0xB0ull << SMUx0B_x8634_Txn8MBusAddr2316_OFFSET) | - (0x00ull << SMUx0B_x8634_Txn8MBusAddr158_OFFSET) | - (0x07ull << SMUx0B_x8634_Txn8MBusAddr70_OFFSET), -// SMUx0B_x8638_ADDRESS, - (0x06ull << SMUx0B_x8638_Txn9MBusAddr70_OFFSET) | - (0x04ull << SMUx0B_x8638_Txn8TransferLength70_OFFSET) | - (0x03ull << SMUx0B_x8638_Txn8Tsize_OFFSET) | - (0x00ull << SMUx0B_x8638_Txn8TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x8638_Txn8Spare_OFFSET) | - (0x01ull << SMUx0B_x8638_Txn8Overlap_OFFSET) | - (0x00ull << SMUx0B_x8638_Txn8Static_OFFSET) | - (0x01ull << SMUx0B_x8638_Txn8Mode_OFFSET), -// SMUx0B_x863C_ADDRESS, - (0x00ull << SMUx0B_x863C_Txn9MBusAddr158_OFFSET) | - (0xB0ull << SMUx0B_x863C_Txn9MBuAaddr2316_OFFSET) | - (0xFEull << SMUx0B_x863C_Txn9MBusAddr3124_OFFSET) | - (0x04ull << SMUx0B_x863C_Txn9TransferLength70_OFFSET), -// SMUx0B_x8640_ADDRESS, - (0x03ull << SMUx0B_x8640_Txn9Tsize_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn9TransferLength138_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn9Spare_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn9Overlap_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn9Static_OFFSET) | - (0x01ull << SMUx0B_x8640_Txn9Mode_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn10MBusAddr158_OFFSET) | - (0x00ull << SMUx0B_x8640_Txn10MBusAddr70_OFFSET) -}; -UINT32 F12SmuGfxShutdownTable_2[] = { -// SMUx0B_x8650_ADDRESS, - 0x76543210, -// SMUx0B_x8654_ADDRESS, - 0xFEDCBA98, -// SMUx0B_x8658_ADDRESS, - 0x80, -// SMUx0B_x865C_ADDRESS, - 0x00320032, -// SMUx0B_x8660_ADDRESS, - 0x00100010, -// SMUx0B_x8664_ADDRESS, - 0x00320032, -// SMUx0B_x866C_ADDRESS, - 0x00, -// SMUx0B_x8670_ADDRESS, - 0x76543210, -// SMUx0B_x8674_ADDRESS, - 0xFEDCBA98, -// SMUx0B_x8678_ADDRESS, - 0x80, -// SMUx0B_x867C_ADDRESS, - 0x00320032, -// SMUx0B_x8680_ADDRESS, - 0x00100010, -// SMUx0B_x8684_ADDRESS, - 0x00320032, -// SMUx0B_x868C_ADDRESS, - 0x00, -// SMUx0B_x8690_ADDRESS, - 0x76543210, -// SMUx0B_x8694_ADDRESS, - 0xFEDCBA98, -// SMUx0B_x8698_ADDRESS, - 0x80, -// SMUx0B_x869C_ADDRESS, - 0x00320032, -// SMUx0B_x86A0_ADDRESS, - 0x00100010, - 0x00320032, - 0x00 -}; - -/*----------------------------------------------------------------------------------------*/ -/** - * Shutdown GFX - * - * - * - * @param[in] StdHeader Standard Configuration Header - */ - - - -VOID -STATIC -F12NbSmuGfxShutdown ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGfxShutdown Enter\n"); - NbSmuRcuRegisterWrite ( - SMUx0B_x8600_ADDRESS, - &F12SmuGfxShutdownTable_1[0], - sizeof (F12SmuGfxShutdownTable_1) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuRcuRegisterWrite ( - SMUx0B_x8650_ADDRESS, - &F12SmuGfxShutdownTable_2[0], - sizeof (F12SmuGfxShutdownTable_2) / sizeof (UINT32), - TRUE, - StdHeader - ); - - NbSmuServiceRequest (0x0B, TRUE, StdHeader); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuGfxShutdown Exit\n"); -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * Power gate unused blocks - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -AGESA_STATUS -F12NbPowerGateFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - NB_POWERGATE_CONFIG NbPowerGate; - FCRxFF30_0398_STRUCT FCRxFF30_0398; - IDS_HDT_CONSOLE (GNB_TRACE, "NbPowerGateFeature Enter\n"); - - NbPowerGate.Services.GmcPowerGate = 0x1; - NbPowerGate.Services.UvdPowerGate = 0x1; - NbPowerGate.Services.GfxPowerGate = 0x1; - LibAmdMemCopy (&NbPowerGate.Gmc, &F12NbGmcPowerGatingData, sizeof (POWER_GATE_DATA), StdHeader); - LibAmdMemCopy (&NbPowerGate.Uvd, &F12NbUvdPowerGatingData, sizeof (POWER_GATE_DATA), StdHeader); - IDS_OPTION_CALLOUT (IDS_CALLOUT_GNB_NB_POWERGATE_CONFIG, &NbPowerGate, StdHeader); - F12NbSmuGmcPowerGatingInit (StdHeader, &NbPowerGate.Gmc); - F12NbSmuUvdPowerGatingInit (StdHeader, &NbPowerGate.Uvd); - if (!GfxLibIsControllerPresent (StdHeader)) { - FCRxFF30_0398.Value = (1 << FCRxFF30_0398_SoftResetGrbm_OFFSET) | (1 << FCRxFF30_0398_SoftResetMc_OFFSET) | - (1 << FCRxFF30_0398_SoftResetDc_OFFSET) | (1 << FCRxFF30_0398_SoftResetRlc_OFFSET) | - (1 << FCRxFF30_0398_SoftResetUvd_OFFSET); - NbSmuSrbmRegisterWrite (FCRxFF30_0398_ADDRESS, &FCRxFF30_0398.Value, TRUE, StdHeader); - if (NbPowerGate.Services.GmcPowerGate == 1) { - IDS_HDT_CONSOLE (GNB_TRACE, " Shutdown GMC\n"); - F12NbSmuGmcShutdown (StdHeader); - } - if (NbPowerGate.Services.UvdPowerGate == 1) { - IDS_HDT_CONSOLE (GNB_TRACE, " Shutdown UVD\n"); - F12NbSmuUvdShutdown (StdHeader); - } - if (NbPowerGate.Services.GfxPowerGate == 1) { - IDS_HDT_CONSOLE (GNB_TRACE, " Shutdown GFX\n"); - F12NbSmuGfxShutdown (StdHeader); - } - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbPowerGateFeature Exit\n"); - return AGESA_SUCCESS; -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Get GMC restore latency - * - * Exit Latency = ((( DAUG_PSO_PWRUP + MOTH_PSO_PWRUP + ISO_TIMER + 7) * PSO_CONTROL_VALID_NUM) + RESET_TIMER ) * 10ns - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -UINT32 -F12NbPowerGateGmcRestoreLatency ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 RestoreLatency; - //@todo may need dynamic calculation - RestoreLatency = ((POWER_GATE_GMC_DAUG_PSO_PWRUP + POWER_GATE_GMC_MOTH_PSO_PWRUP + POWER_GATE_GMC_ISO_TIMER + 7) * - POWER_GATE_GMC_PSO_CONTROL_VALID_NUM + POWER_GATE_GMC_RESET_TIMER) * 10; - return RestoreLatency; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h deleted file mode 100644 index 1bdb973ce4..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h +++ /dev/null @@ -1,60 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB Power gate Gfx/Uvd/Gmc - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _F12NBPOWERGATE_H_ -#define _F12NBPOWERGATE_H_ - -AGESA_STATUS -F12NbPowerGateFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - - -UINT32 -F12NbPowerGateGmcRestoreLatency ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c deleted file mode 100644 index 3d81adf77d..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c +++ /dev/null @@ -1,713 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Graphics Controller family specific service procedure - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbPcie.h" -#include "GnbCommonLib.h" -#include "GnbGfxInitLibV1.h" -#include "GnbNbInitLibV1.h" -#include "GnbPcieConfig.h" -#include "NbConfigData.h" -#include "OptionGnb.h" -#include "NbLclkDpm.h" -#include "NbFamilyServices.h" -#include "NbPowerMgmt.h" -#include "GnbRegistersLN.h" -#include "cpuFamilyTranslation.h" -#include "GfxLib.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_FAMILY_LN_F12NBSERVICES_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -extern GNB_BUILD_OPTIONS GnbBuildOptions; -FUSE_TABLE FuseTable; - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*----------------------------------------------------------------------------------------*/ -/** - * NB family specific clock gating - * - * - * @param[in, out] NbClkGatingCtrl Pointer to NB_CLK_GATING_CTRL - * @param[in] StdHeader Pointer to AMD_CONFIG_PARAMS - */ -VOID -NbFmNbClockGating ( - IN OUT VOID *NbClkGatingCtrl, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - return; -} - -/*----------------------------------------------------------------------------------------*/ -/** - * UnitID Clumping - * - * - * @param[in] NbPciAddress - * @param[in] StdHeader Standard Configuration Header - * @retval AGESA_STATUS - */ - -VOID -NbFmClumpUnitID ( - IN PCI_ADDR NbPciAddress, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - GnbClumpUnitID (NbPciAddress, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Get Fuse translation table - * - * - * @retval pointer to fuse translation table - */ - -FUSE_TABLE* -NbFmGetFuseTranslationTable ( - ) -{ - return &FuseTable; -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Family specific fuse table patch - * Is's correct behavior if we would have 4 states, it would be - * PP_FUSE_ARRAY->LclkDpmDid[0] - Goes to State 5 - * PP_FUSE_ARRAY->LclkDpmDid[1] - Goes to State 6 - * PP_FUSE_ARRAY->LclkDpmDid[2] - Goes to State 7 - * If we would have 4 states it would be - * PP_FUSE_ARRAY->LclkDpmDid[0] - Goes to State 4 - * PP_FUSE_ARRAY->LclkDpmDid[1] - Goes to State 5 - * PP_FUSE_ARRAY->LclkDpmDid[2] - Goes to State 6 - * PP_FUSE_ARRAY->LclkDpmDid[3] - Goes to State 7 - * - * @param[in] PpFuseArray Pointer to PP_FUSE_ARRAY - * @param[in] StdHeader Pointer to AMD_CONFIG_PARAMS - */ -VOID -NbFmFuseAdjustFuseTablePatch ( - IN OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 LclkDpmMode; - UINT8 SwSatateIndex; - UINT8 MaxSclkIndex; - UINT8 DpmStateIndex; - UINT8 CurrentSclkDpmDid; - CPU_LOGICAL_ID LogicalId; - D18F3x15C_STRUCT D18F3x15C; - - LclkDpmMode = GnbBuildOptions.LclkDpmEn ? LclkDpmRcActivity : LclkDpmDisabled; - GetLogicalIdOfCurrentCore (&LogicalId, StdHeader); - if ((LogicalId.Revision & (AMD_F12_LN_A0 | AMD_F12_LN_A1)) != 0) { - LclkDpmMode = LclkDpmDisabled; - } - IDS_OPTION_HOOK (IDS_GNB_LCLK_DPM_EN, &LclkDpmMode, StdHeader); - - // Read Sclk VID - GnbLibPciRead ( - MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3x15C_ADDRESS), - AccessWidth32, - &D18F3x15C.Value, - StdHeader - ); - PpFuseArray->SclkVid[0] = (UINT8) (D18F3x15C.Field.SclkVidLevel0); - PpFuseArray->SclkVid[1] = (UINT8) (D18F3x15C.Field.SclkVidLevel1); - PpFuseArray->SclkVid[2] = (UINT8) (D18F3x15C.Field.SclkVidLevel2); - PpFuseArray->SclkVid[3] = (UINT8) (D18F3x15C.Field.SclkVidLevel3); - - //For all CPU rev LclkDpmValid[3] = 0 - PpFuseArray->LclkDpmValid[3] = 0; - PpFuseArray->LclkDpmVid[3] = 0; - PpFuseArray->LclkDpmDid[3] = 0; - - // For LCLKDPM set LclkDpmVid[0] = 0, no matter if LCLK DMP enable or disable. - PpFuseArray->LclkDpmVid[0] = 0; - - if (LclkDpmMode != LclkDpmRcActivity) { - //If LCLK DPM disable (LclkDpmMode != LclkDpmRcActivity) - // - LclkDpmDid[1,2] = LclkDpmDid [0], LclkDpmVid[1,2] = LclkDpmVid[0] - // - Execute LCLK DPM init - - PpFuseArray->LclkDpmVid[1] = PpFuseArray->LclkDpmVid[0]; - PpFuseArray->LclkDpmVid[2] = PpFuseArray->LclkDpmVid[0]; - PpFuseArray->LclkDpmDid[1] = PpFuseArray->LclkDpmDid[0]; - PpFuseArray->LclkDpmDid[2] = PpFuseArray->LclkDpmDid[0]; - IDS_HDT_CONSOLE (NB_MISC, " F12 LCLK DPM Mode Disable -- use DPM0 fusing\n"); - - } else { - // If LCLK DPM enabled - // - use fused values for LclkDpmDid[0,1,2] and appropriate voltage - // - Execute LCLK DPM init - PpFuseArray->LclkDpmVid[2] = PpFuseArray->PcieGen2Vid; - if (GfxLibIsControllerPresent (StdHeader)) { - //VID index = VID index associated with highest SCLK DPM state in the Powerplay state where Label_Performance=1 // This would ignore the UVD case (where Label_Performance would be 0). - for (SwSatateIndex = 0 ; SwSatateIndex < PP_FUSE_MAX_NUM_SW_STATE; SwSatateIndex++) { - if (PpFuseArray->PolicyLabel[SwSatateIndex] == POLICY_LABEL_PERFORMANCE) { - break; - } - } - MaxSclkIndex = 0; - CurrentSclkDpmDid = 0xff; - ASSERT (PpFuseArray->SclkDpmValid[SwSatateIndex] != 0); - for (DpmStateIndex = 0; DpmStateIndex < PP_FUSE_MAX_NUM_DPM_STATE; DpmStateIndex++) { - if ((PpFuseArray->SclkDpmValid[SwSatateIndex] & (1 << DpmStateIndex)) != 0) { - if (PpFuseArray->SclkDpmDid[DpmStateIndex] < CurrentSclkDpmDid) { - CurrentSclkDpmDid = PpFuseArray->SclkDpmDid[DpmStateIndex]; - MaxSclkIndex = DpmStateIndex; - } - } - } - PpFuseArray->LclkDpmVid[1] = PpFuseArray->SclkDpmVid[MaxSclkIndex]; - } else { - PpFuseArray->LclkDpmVid[1] = PpFuseArray->LclkDpmVid[0]; - PpFuseArray->LclkDpmDid[1] = PpFuseArray->LclkDpmDid[0]; - } - // - use fused values for LclkDpmDid[0,1,2] and appropriate voltage - //Keep using actual fusing - IDS_HDT_CONSOLE (NB_MISC, " LCLK DPM use actual fusing.\n"); - } - - //Patch SclkThermDid to 200Mhz if not fused - if (PpFuseArray->SclkThermDid == 0) { - PpFuseArray->SclkThermDid = GfxLibCalculateDid (200 * 100, GfxLibGetMainPllFreq (StdHeader) * 100); - } -} - - -/*---------------------------------------------------------------------------------------- - * FUSE translation table - *---------------------------------------------------------------------------------------- - */ - -FUSE_REGISTER_ENTRY FCRxFE00_600E_TABLE [] = { - { - FCRxFE00_600E_MainPllOpFreqIdStartup_OFFSET, - FCRxFE00_600E_MainPllOpFreqIdStartup_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, MainPllId) - }, - { - FCRxFE00_600E_WrCkDid_OFFSET, - FCRxFE00_600E_WrCkDid_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, WrCkDid) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_6022_TABLE [] = { - { - FCRxFE00_6022_DclkVclkSel0_OFFSET, - FCRxFE00_6022_DclkVclkSel0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[0]) - }, - { - FCRxFE00_6022_DclkVclkSel1_OFFSET, - FCRxFE00_6022_DclkVclkSel1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[1]) - }, - { - FCRxFE00_6022_DclkVclkSel2_OFFSET, - FCRxFE00_6022_DclkVclkSel2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[2]) - }, - { - FCRxFE00_6022_DclkVclkSel3_OFFSET, - FCRxFE00_6022_DclkVclkSel3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[3]) - }, - { - FCRxFE00_6022_DclkVclkSel4_OFFSET, - FCRxFE00_6022_DclkVclkSel4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[4]) - }, - { - FCRxFE00_6022_DclkVclkSel5_OFFSET, - FCRxFE00_6022_DclkVclkSel5_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDclkSel[5]) - }, -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7103_TABLE [] = { - { - FCRxFE00_7103_SclkDpmVid0_OFFSET, - FCRxFE00_7103_SclkDpmVid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmVid[0]) - }, - { - FCRxFE00_7103_SclkDpmVid1_OFFSET, - FCRxFE00_7103_SclkDpmVid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmVid[1]) - }, - { - FCRxFE00_7103_SclkDpmVid2_OFFSET, - FCRxFE00_7103_SclkDpmVid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmVid[2]) - }, - { - FCRxFE00_7103_SclkDpmVid3_OFFSET, - FCRxFE00_7103_SclkDpmVid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmVid[3]) - }, - { - FCRxFE00_7103_SclkDpmVid4_OFFSET, - FCRxFE00_7103_SclkDpmVid4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmVid[4]) - }, -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7104_TABLE [] = { - { - FCRxFE00_7104_SclkDpmDid0_OFFSET, - FCRxFE00_7104_SclkDpmDid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmDid[0]) - }, - { - FCRxFE00_7104_SclkDpmDid1_OFFSET, - FCRxFE00_7104_SclkDpmDid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmDid[1]) - }, - { - FCRxFE00_7104_SclkDpmDid2_OFFSET, - FCRxFE00_7104_SclkDpmDid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmDid[2]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7107_TABLE [] = { - { - FCRxFE00_7107_SclkDpmDid3_OFFSET, - FCRxFE00_7107_SclkDpmDid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmDid[3]) - }, - { - FCRxFE00_7107_SclkDpmDid4_OFFSET, - FCRxFE00_7107_SclkDpmDid4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmDid[4]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7109_TABLE [] = { - { - FCRxFE00_7109_SclkDpmCacBase_OFFSET, - FCRxFE00_7109_SclkDpmCacBase_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmCac[4]) - } -}; - - -FUSE_REGISTER_ENTRY FCRxFE00_710D_TABLE [] = { - { - FCRxFE00_710D_DispclkDid0_OFFSET, - FCRxFE00_710D_DispclkDid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DisplclkDid[0]) - }, - { - FCRxFE00_710D_DispclkDid1_OFFSET, - FCRxFE00_710D_DispclkDid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DisplclkDid[1]) - }, - { - FCRxFE00_710D_DispclkDid2_OFFSET, - FCRxFE00_710D_DispclkDid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DisplclkDid[2]) - }, - { - FCRxFE00_710D_DispclkDid3_OFFSET, - FCRxFE00_710D_DispclkDid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DisplclkDid[3]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7110_TABLE [] = { - { - FCRxFE00_7110_LclkDpmDid0_OFFSET, - FCRxFE00_7110_LclkDpmDid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmDid[0]) - }, - { - FCRxFE00_7110_LclkDpmDid1_OFFSET, - FCRxFE00_7110_LclkDpmDid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmDid[1]) - }, - { - FCRxFE00_7110_LclkDpmDid2_OFFSET, - FCRxFE00_7110_LclkDpmDid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmDid[2]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7113_TABLE [] = { - { - FCRxFE00_7113_LclkDpmDid3_OFFSET, - FCRxFE00_7113_LclkDpmDid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmDid[3]) - }, - { - FCRxFE00_7113_LclkDpmValid0_OFFSET, - FCRxFE00_7113_LclkDpmValid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmValid[0]) - }, - { - FCRxFE00_7113_LclkDpmValid1_OFFSET, - FCRxFE00_7113_LclkDpmValid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmValid[1]) - }, - { - FCRxFE00_7113_LclkDpmValid2_OFFSET, - FCRxFE00_7113_LclkDpmValid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmValid[2]) - }, - { - FCRxFE00_7113_LclkDpmValid3_OFFSET, - FCRxFE00_7113_LclkDpmValid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, LclkDpmValid[3]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7114_TABLE [] = { - { - FCRxFE00_7114_DclkDid0_OFFSET, - FCRxFE00_7114_DclkDid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DclkDid[0]) - }, - { - FCRxFE00_7114_DclkDid1_OFFSET, - FCRxFE00_7114_DclkDid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DclkDid[1]) - }, - { - FCRxFE00_7114_DclkDid2_OFFSET, - FCRxFE00_7114_DclkDid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DclkDid[2]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7117_TABLE [] = { - { - FCRxFE00_7117_DclkDid3_OFFSET, - FCRxFE00_7117_DclkDid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, DclkDid[3]) - }, - { - FCRxFE00_7117_VclkDid3_OFFSET, - FCRxFE00_7117_VclkDid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDid[3]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7119_TABLE [] = { - { - FCRxFE00_7119_SclkDpmValid0_OFFSET, - FCRxFE00_7119_SclkDpmValid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[0]) - }, - { - FCRxFE00_7119_SclkDpmValid1_OFFSET, - FCRxFE00_7119_SclkDpmValid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[1]) - }, - { - FCRxFE00_7119_SclkDpmValid2_OFFSET, - FCRxFE00_7119_SclkDpmValid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[2]) - }, - { - FCRxFE00_7119_SclkDpmValid3_OFFSET, - FCRxFE00_7119_SclkDpmValid3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[3]) - }, - { - FCRxFE00_7119_SclkDpmValid4_OFFSET, - FCRxFE00_7119_SclkDpmValid4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[4]) - }, - { - FCRxFE00_7119_SclkDpmValid5_OFFSET, - FCRxFE00_7119_SclkDpmValid5_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkDpmValid[5]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_711C_TABLE [] = { - { - FCRxFE00_711C_PolicyLabel0_OFFSET, - FCRxFE00_711C_PolicyLabel0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[0]) - }, - { - FCRxFE00_711C_PolicyLabel1_OFFSET, - FCRxFE00_711C_PolicyLabel1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[1]) - }, - { - FCRxFE00_711C_PolicyLabel2_OFFSET, - FCRxFE00_711C_PolicyLabel2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[2]) - }, - { - FCRxFE00_711C_PolicyLabel3_OFFSET, - FCRxFE00_711C_PolicyLabel3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[3]) - }, - { - FCRxFE00_711C_PolicyLabel4_OFFSET, - FCRxFE00_711C_PolicyLabel4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[4]) - }, - { - FCRxFE00_711C_PolicyLabel5_OFFSET, - FCRxFE00_711C_PolicyLabel5_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyLabel[5]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_711E_TABLE [] = { - { - FCRxFE00_711E_PolicyFlags0_OFFSET, - FCRxFE00_711E_PolicyFlags0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[0]) - }, - { - FCRxFE00_711E_PolicyFlags1_OFFSET, - FCRxFE00_711E_PolicyFlags1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[1]) - }, - { - FCRxFE00_711E_PolicyFlags2_OFFSET, - FCRxFE00_711E_PolicyFlags2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[2]) - }, - { - FCRxFE00_711E_PolicyFlags3_OFFSET, - FCRxFE00_711E_PolicyFlags3_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[3]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_7121_TABLE [] = { - { - FCRxFE00_7121_PolicyFlags4_OFFSET, - FCRxFE00_7121_PolicyFlags4_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[4]) - }, - { - FCRxFE00_7121_PolicyFlags5_OFFSET, - FCRxFE00_7121_PolicyFlags5_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PolicyFlags[5]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_4036_TABLE [] = { - { - FCRxFE00_4036_PPlayTableRev_OFFSET, - FCRxFE00_4036_PPlayTableRev_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PPlayTableRev) - }, - { - FCRxFE00_4036_SclkThermDid_OFFSET, - FCRxFE00_4036_SclkThermDid_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, SclkThermDid) - }, - { - FCRxFE00_4036_PcieGen2Vid_OFFSET, - FCRxFE00_4036_PcieGen2Vid_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, PcieGen2Vid) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_4003_TABLE [] = { - { - FCRxFE00_4003_VclkDid0_OFFSET, - FCRxFE00_4003_VclkDid0_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDid[0]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_4008_TABLE [] = { - { - FCRxFE00_4008_VclkDid1_OFFSET, - FCRxFE00_4008_VclkDid1_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDid[1]) - } -}; - -FUSE_REGISTER_ENTRY FCRxFE00_4028_TABLE [] = { - { - FCRxFE00_4028_VclkDid2_OFFSET, - FCRxFE00_4028_VclkDid2_WIDTH, - (UINT8) offsetof (PP_FUSE_ARRAY, VclkDid[2]) - } -}; - -FUSE_TABLE_ENTRY FuseRegisterTable [] = { - { - FCRxFE00_4003_ADDRESS, - sizeof (FCRxFE00_4003_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_4003_TABLE - }, - { - FCRxFE00_4008_ADDRESS, - sizeof (FCRxFE00_4008_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_4008_TABLE - }, - { - FCRxFE00_4028_ADDRESS, - sizeof (FCRxFE00_4028_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_4028_TABLE - }, - { - FCRxFE00_4036_ADDRESS, - sizeof (FCRxFE00_4036_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_4036_TABLE - }, - { - FCRxFE00_600E_ADDRESS, - sizeof (FCRxFE00_600E_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_600E_TABLE - }, - { - FCRxFE00_6022_ADDRESS, - sizeof (FCRxFE00_6022_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_6022_TABLE - }, - { - FCRxFE00_7103_ADDRESS, - sizeof (FCRxFE00_7103_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7103_TABLE - }, - { - FCRxFE00_7104_ADDRESS, - sizeof (FCRxFE00_7104_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7104_TABLE - }, - { - FCRxFE00_7107_ADDRESS, - sizeof (FCRxFE00_7107_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7107_TABLE - }, - { - FCRxFE00_7109_ADDRESS, - sizeof (FCRxFE00_7109_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7109_TABLE - }, - { - FCRxFE00_710D_ADDRESS, - sizeof (FCRxFE00_710D_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_710D_TABLE - }, - { - FCRxFE00_7110_ADDRESS, - sizeof (FCRxFE00_7110_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7110_TABLE - }, - { - FCRxFE00_7113_ADDRESS, - sizeof (FCRxFE00_7113_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7113_TABLE - }, - { - FCRxFE00_7114_ADDRESS, - sizeof (FCRxFE00_7114_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7114_TABLE - }, - { - FCRxFE00_7117_ADDRESS, - sizeof (FCRxFE00_7117_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7117_TABLE - }, - { - FCRxFE00_7119_ADDRESS, - sizeof (FCRxFE00_7119_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7119_TABLE - }, - { - FCRxFE00_711C_ADDRESS, - sizeof (FCRxFE00_711C_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_711C_TABLE - }, - { - FCRxFE00_711E_ADDRESS, - sizeof (FCRxFE00_711E_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_711E_TABLE - }, - { - FCRxFE00_7121_ADDRESS, - sizeof (FCRxFE00_7121_TABLE) / sizeof (FUSE_REGISTER_ENTRY), - FCRxFE00_7121_TABLE - } -}; - -FUSE_TABLE FuseTable = { - sizeof (FuseRegisterTable) / sizeof (FUSE_TABLE_ENTRY), - FuseRegisterTable -}; diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c deleted file mode 100644 index 934c7dc700..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c +++ /dev/null @@ -1,101 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * SMU initialization - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 47632 $ @e \$Date: 2011-02-24 13:42:20 +0800 (Thu, 24 Feb 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -//#include "heapManager.h" -#include "Gnb.h" -#include "NbSmuLib.h" -#include "F12NbSmuFirmware.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_FAMILY_LN_F12NBSMU_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ -AGESA_STATUS -F12NbSmuInitFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Initialize - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -AGESA_STATUS -F12NbSmuInitFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - SMU_FIRMWARE_REV Revision; - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuInitFeature Enter\n"); - Revision = NbSmuFirmwareRevision (StdHeader); - IDS_HDT_CONSOLE (NB_MISC, " Current SMU firmware rev %d.%x\n", Revision.MajorRev, Revision.MinorRev); - IDS_HDT_CONSOLE (NB_MISC, " New SMU firmware rev %d.%x\n", Fm.Revision.MajorRev, Fm.Revision.MinorRev); - if ((Revision.MajorRev < Fm.Revision.MajorRev) || (Revision.MajorRev == Fm.Revision.MajorRev && Revision.MinorRev < Fm.Revision.MinorRev)) { - IDS_HDT_CONSOLE (NB_MISC, " Updating SMU firmware\n"); - NbSmuFirmwareDownload (&Fm, StdHeader); - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuInitFeature Exit\n"); - return AGESA_SUCCESS; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h deleted file mode 100644 index 6c5facf8ef..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h +++ /dev/null @@ -1,3009 +0,0 @@ -/** - * @file - * - * SMU firmware. - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 18962 \$ @e \$Date: 2009-09-07 20:35:39 -0700 (Mon, 07 Sep 2009) \$ - * - */ -/* - ****************************************************************************** - * - * Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - ****************************************************************************** - */ - - -#ifndef _F12NBSMUFIRMWARE_H_ -#define _F12NBSMUFIRMWARE_H_ - -UINT32 DataBlock0[] = { - 0x00110100, - 0xbdff018e, - 0x00ce03bc, - 0x00ce1810, - 0xa6082000, - 0x00a71800, - 0x8c081808, - 0xf3251000, - 0x270000cc, - 0x97bdce0b, - 0x8308006f, - 0xf8260100, - 0xbcbd248d, - 0x90fb2006, - 0xde20900a, - 0x02de3c00, - 0x3c04de3c, - 0x9f3c06de, - 0x06df3806, - 0x3804df38, - 0xdf3802df, - 0x06de3b00, - 0xde069f3c, - 0xce183c08, - 0x90fc0c83, - 0x02ed1802, - 0x180090fc, - 0x7fce00ed, - 0x03001caa, - 0xed185f4f, - 0x0ced180e, - 0x1812ed18, - 0xed1810ed, - 0x14ed1816, - 0x181aed18, - 0x85ce18ed, - 0xed02edb4, - 0x2883ce00, - 0x00ed02ed, - 0xed2c83ce, - 0xce00ed02, - 0x02ed3084, - 0x84ce00ed, - 0xed02ed2c, - 0x00ce1800, - 0xf5babd47, - 0x0c274085, - 0xcc3083ce, - 0x02ed0100, - 0x07205f4f, - 0x4f3083ce, - 0xed02ed5f, - 0xfc8fce00, - 0x02ed5f4f, - 0x82ce00ed, - 0x9993ccd6, - 0x82ce00ed, - 0xe79dccc4, - 0x82ce00ed, - 0xff9dccc6, - 0x82ce00ed, - 0x29b9ccc8, - 0x82ce00ed, - 0x699accca, - 0x82ce00ed, - 0xb293ccda, - 0x82ce00ed, - 0x8a9bccdc, - 0x82ce00ed, - 0x689bccde, - 0x82ce00ed, - 0x9294cce2, - 0x82ce00ed, - 0x9d99cce4, - 0x82ce00ed, - 0x8497cce6, - 0x82ce00ed, - 0xcd97cce8, - 0x82ce00ed, - 0x2898ccea, - 0x82ce00ed, - 0x9d98ccec, - 0x82ce00ed, - 0xf098ccee, - 0x82ce00ed, - 0x1399ccf0, - 0x82ce00ed, - 0x3899ccf2, - 0x82ce00ed, - 0x1697ccf4, - 0x82ce00ed, - 0x579cccf6, - 0x82ce00ed, - 0xea94ccf8, - 0x82ce00ed, - 0xd2b6cc9a, - 0x82ce00ed, - 0x49b9cc94, - 0xbcce00ed, - 0x09bdffb8, - 0x4f2482ce, - 0xed02ed5f, - 0x2882ce00, - 0x00ed02ed, - 0xed2c82ce, - 0xce00ed02, - 0x02ed3082, - 0x85ce00ed, - 0xed02ed84, - 0x8885ce00, - 0xed0100cc, - 0xed5f4f02, - 0x80ce1800, - 0x687ece12, - 0x00e703c6, - 0x1802df18, - 0xce647ece, - 0xefcd00fe, - 0x667ece00, - 0xed1240cc, - 0xe6188f00, - 0x7ece8f00, - 0xc400e667, - 0xcef72701, - 0x00ec607e, - 0x00ed02de, - 0x1804df18, - 0xce1480ce, - 0x00ec627e, - 0x1800ed18, - 0xce1804de, - 0x7ece1680, - 0x1640cc66, - 0x7ece00ed, - 0x1800e664, - 0xde1802df, - 0x677ece04, - 0x01c400e6, - 0x7ecef727, - 0x1800ec60, - 0xde1804df, - 0x00ed1802, - 0x08180818, - 0xec627ece, - 0x00ed1800, - 0x08180818, - 0xcc667ece, - 0x00ed1a40, - 0xe6647ece, - 0x02df1800, - 0xce04de18, - 0x00e6677e, - 0xf72701c4, - 0xec607ece, - 0x04df1800, - 0x1802de18, - 0x081800ed, - 0x7ece0818, - 0x1800ec62, - 0x081800ed, - 0x7ece0818, - 0x1e40cc66, - 0x7ece00ed, - 0x1800e664, - 0xde1802df, - 0x677ece04, - 0x01c400e6, - 0x7ecef727, - 0x1800ec60, - 0xde1804df, - 0x00ed1802, - 0x08180818, - 0xec627ece, - 0x00ed1800, - 0xbd04de18, - 0xbbbdb3b4, - 0x687eced5, - 0x00e703c6, - 0x647ece18, - 0xcd00fece, - 0x7ece00ef, - 0x5f70cc66, - 0x188f00ed, - 0xce8f00e6, - 0x00e6677e, - 0xf72701c4, - 0x18607ece, - 0x1800e68f, - 0x617ece8f, - 0x8f1800e6, - 0x8f1809d7, - 0x0409d617, - 0x04040404, - 0x83ce0fc4, - 0xce00e731, - 0xc6cc5884, - 0xcc02ed90, - 0x00ed0090, - 0xadc3e4ce, - 0x84ce1800, - 0x3083ce5e, - 0xc400e618, - 0x1800e77f, - 0x7fc400e6, - 0x83ce09d7, - 0xdb00e631, - 0x2a09d709, - 0x00e61807, - 0x09d77fc4, - 0x83ce09d6, - 0x0e00e731, - 0xc6ed84ce, - 0xc600e701, - 0xcf00e702, - 0x00defd20, - 0x3c02de3c, - 0xde3c04de, - 0x069f3c06, - 0x3806df38, - 0xdf3804df, - 0x00df3802, - 0x3c00de3b, - 0xde3c02de, - 0x06de3c04, - 0x38069f3c, - 0xdf3806df, - 0x02df3804, - 0x3b00df38, - 0x9f3c06de, - 0x06df3806, - 0x3c06de39, - 0x86ce069f, - 0xc100e600, - 0x8d07220b, - 0x7fd5ce40, - 0xdf3800ad, - 0x06de3906, - 0xce069f3c, - 0x00e60086, - 0x25220bc1, - 0x7ece278d, - 0xe7dfc601, - 0x647ece00, - 0xed02ffcc, - 0x627ece00, - 0xed0086cc, - 0x017ece00, - 0x20c400e6, - 0x9ebdf727, - 0x06df3871, - 0x3c06de39, - 0x08de069f, - 0x3c0ade3c, - 0x4f0886ce, - 0xdd0add5f, - 0xde02df08, - 0x3f001d02, - 0x1804df18, - 0x8f1802de, - 0x180700c3, - 0xde0adc8f, - 0x0100c308, - 0xdd080124, - 0x1808df0a, - 0xde1802df, - 0x00008c04, - 0x831a0626, - 0xcf230a00, - 0x86ce04df, - 0xdd5f4f04, - 0xdf08dd0a, - 0xde04de02, - 0x1800df02, - 0x081800de, - 0xc38f04df, - 0x188f0700, - 0xf08400ec, - 0x04de02df, - 0xfe00831a, - 0x00cc1426, - 0x00ed18fe, - 0xe680001d, - 0xc1f0c400, - 0x1d032620, - 0x0adc0e00, - 0x00c308de, - 0x08012401, - 0x08df0add, - 0x831a0626, - 0xb7230a00, - 0x380adf38, - 0xdf3808df, - 0x06de3906, - 0xce069f3c, - 0x00e60785, - 0x4f0000ce, - 0x2600008c, - 0x00831a06, - 0x8c2d2701, - 0x362e0000, - 0x831a342b, - 0x0b220100, - 0x2600008c, - 0x2700dd29, - 0x8c23200f, - 0x1e260000, - 0x0200831a, - 0x16201227, - 0xbd0885cc, - 0x0e20999e, - 0xbd3085cc, - 0x0620999e, - 0xbd5885cc, - 0xdf38999e, - 0x06de3906, - 0xde069f3c, - 0x0ade3c08, - 0xaa7fce3c, - 0xce01001d, - 0x001c8f7f, - 0x8d1bc610, - 0x377f846b, - 0xbd1bc636, - 0x04c62c96, - 0x7fce5e8d, - 0x10001d8f, - 0x1daa7fce, - 0x001c0100, - 0x38313101, - 0xdf380adf, - 0x06df3808, - 0x3c06de39, - 0x08de069f, - 0x3c0ade3c, - 0x1daa7fce, - 0x7fce0100, - 0x10001c8f, - 0x288d1bc6, - 0x3637808a, - 0x96bd1bc6, - 0x8d04c62c, - 0x8f7fce1b, - 0xce10001d, - 0x001daa7f, - 0x01001c01, - 0xdf383131, - 0x08df380a, - 0x3906df38, - 0x9f3c06de, - 0x3c08de06, - 0xde3c0ade, - 0x0ede3c0c, - 0xcc0dd73c, - 0x36374d00, - 0x36375f4f, - 0xce6000cc, - 0xa0bd0002, - 0x6400cca6, - 0xbd0002ce, - 0x08df84a0, - 0x37cd00cc, - 0x375f4f36, - 0x6000cc36, - 0xbd0002ce, - 0x8f18a6a0, - 0x8f180dd6, - 0x7f0edf18, - 0x0edc0e00, - 0x007f0cdd, - 0x0e007f0f, - 0x38183818, - 0x38183818, - 0x018508dc, - 0x0cde0826, - 0x8f018a8f, - 0x0edc0cdf, - 0x0cdc3637, - 0x00cc3637, - 0x0002ce64, - 0xcca6a0bd, - 0x36374e00, - 0x36375f4f, - 0xce6000cc, - 0xa0bd0002, - 0x6400cca6, - 0xbd0002ce, - 0x381884a0, - 0x38183818, - 0x38183818, - 0x180edf18, - 0x0cdf1838, - 0xdf183818, - 0x1838180a, - 0x381808df, - 0x3906df18, - 0x9f3c06de, - 0x3c08de06, - 0xde3c0ade, - 0x0ede3c0c, - 0xcc0dd73c, - 0x36374d00, - 0x36375f4f, - 0xce6000cc, - 0xa0bd0002, - 0x6400cca6, - 0xbd0002ce, - 0x08df84a0, - 0x37cd00cc, - 0x375f4f36, - 0x6000cc36, - 0xbd0002ce, - 0x8f18a6a0, - 0x8f180dd6, - 0x7f0edf18, - 0x007f0e00, - 0x0c007f0d, - 0x02ce5f4f, - 0x0e9a8f00, - 0xdd8f0fda, - 0xde0cdf0e, - 0x9a05ec06, - 0xde0fda0e, - 0x180edd0c, - 0x18381838, - 0xdc381838, - 0x26018508, - 0x018a8f06, - 0xdc0cdf8f, - 0xdc36370e, - 0xcc36370c, - 0x02ce6400, - 0xa6a0bd00, - 0xdf383838, - 0x0cdf380e, - 0x380adf38, - 0xdf3808df, - 0x06de3906, - 0xde069f3c, - 0x0ade3c08, - 0x0a007f3c, - 0x007f0bd7, - 0x08007f09, - 0x36370adc, - 0x363708dc, - 0xce6000cc, - 0xa0bd0002, - 0x6400cca6, - 0xbd0002ce, - 0x381884a0, - 0x38183818, - 0x180adf18, - 0x08df1838, - 0xdf183818, - 0x06de3906, - 0xde069f3c, - 0x0ade3c08, - 0x3c0cde3c, - 0xce3c0ede, - 0x02ec9085, - 0x00ec0edd, - 0x0edc0cdd, - 0xcaf0845f, - 0xdd0e8a04, - 0xaa7fce0e, - 0xde01001d, - 0xe19fbd0c, - 0x08df0add, - 0xe69785ce, - 0xdc062600, - 0x20118a0a, - 0x840adc04, - 0x370addef, - 0x3708dc36, - 0xde0edc36, - 0x2ca0bd0c, - 0x1caa7fce, - 0x38380100, - 0x380edf38, - 0xdf380cdf, - 0x08df380a, - 0x3906df38, - 0x9f3c06de, - 0x8f85ce06, - 0x03c400e6, - 0xce181827, - 0xe6182e84, - 0x2601c400, - 0x85ce180d, - 0x02ec188c, - 0xbd00eecd, - 0x85cecfa0, - 0xc400e68f, - 0x18162704, - 0x188c85ce, - 0xafbd00ec, - 0x2e84ce82, - 0x02c400e6, - 0xb0bd0326, - 0x06df38ea, - 0x3c06de39, - 0x85ce069f, - 0xc400e68f, - 0xce142707, - 0x00ec8c85, - 0xcefaafbd, - 0x00e62e84, - 0x032602c4, - 0xced3b1bd, - 0x00e68f85, - 0x2c2703c4, - 0xe62e84ce, - 0x2601c400, - 0x8c85ce23, - 0x00ee02ec, - 0xcee5a2bd, - 0x00e68f85, - 0x102701c4, - 0xec8c85ce, - 0xe2a6bd00, - 0xec8c85ce, - 0xfca8bd00, - 0x3906df38, - 0x9f3c06de, - 0x9b85ce06, - 0x02c400e6, - 0xce180a27, - 0xec189885, - 0x73bbbd00, - 0xe69b85ce, - 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0xce181e83, - 0xff1830ff, - 0x7eff647e, - 0x627efd60, - 0x84677eb6, - 0x39f92701, - 0xde3c08de, - 0x08d73c0a, - 0xc4028417, - 0x54544404, - 0x8f2101c3, - 0x01c408d6, - 0x0b00c34f, - 0x2800ce18, - 0xce18b48d, - 0x918d2900, - 0xce1801ca, - 0xa68d2900, - 0x380adf38, - 0xde3908df, - 0x0ade3c08, - 0xc10fc43c, - 0xdd4f260f, - 0x02841608, - 0x544404c4, - 0x2101c354, - 0xd68f0add, - 0x4f01c408, - 0x180b00c3, - 0xbd2800ce, - 0xce1812bb, - 0xbabd2900, - 0x18fec4f5, - 0xbd2900ce, - 0x0ade12bb, - 0x01840896, - 0x0306c35f, - 0xce18f08a, - 0xbbbd2800, - 0x0000ce12, - 0x180300cc, - 0xbd2900ce, - 0xdf3812bb, - 0x08df380a, - 0x18ce1839, - 0xf5babd49, - 0x18263fc4, - 0x4918ce18, - 0xcc0000ce, - 0xbbbd3f00, - 0x0000cc12, - 0xfdf885fd, - 0x0a20fa85, - 0xff0000ce, - 0xfd4ff885, - 0x4f39fa85, - 0x3e0e3906, - 0x820cfc20, - 0x30002834, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x34820c00, - 0xff300028, - 0x2909c004, - 0x04ff3000, - 0x002809c0, - 0xc004ff30, - 0x30002909, - 0x09c004ff, - 0xff300028, - 0x2909c004, - 0x04ff3000, - 0x002809c0, - 0xc004ff30, - 0x30002909, - 0x09c004ff, - 0xff300028, - 0x2909c004, - 0x04ff3000, - 0x002809c0, - 0xc004ff30, - 0x30002909, - 0x01c004ff, - 0x10803101, - 0x00000000, - 0x11803101, - 0x00000000, - 0x12803101, - 0x00000000, - 0x13803101, - 0x00000000, - 0x14803101, - 0x00000000, - 0x15803101, - 0x00000000, - 0x16803101, - 0x00000000, - 0x17803101, - 0x00000000, - 0x11000102, - 0x00000000, - 0x63803101, - 0x00000000, - 0x28000014, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x2800c004, - 0x04ff3000, - 0x002901c0, - 0xc004ff30, - 0x30002800, - 0x01c004ff, - 0xff300029, - 0x0000c004 -}; - -UINT32 DataBlock1[] = { - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0x3b903b90, - 0xc0e33b90, - 0x3b90d8e3, - 0x04900490, - 0x04900490 -}; - -SMU_FIRMWARE_BLOCK FmBlockArray[] = { - { - 0x9000, - 0xb66, - &DataBlock0[0] - }, - { - 0xbfc0, - 0x10, - &DataBlock1[0] - } -}; - -SMU_FIRMWARE_HEADER Fm = { - { - 0x1, 0x1100 - }, - 2, - &FmBlockArray[0] -}; -#endif - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/Makefile.inc b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/Makefile.inc deleted file mode 100644 index 477451e560..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/Makefile.inc +++ /dev/null @@ -1,4 +0,0 @@ -libagesa-y += F12NbLclkDpm.c -libagesa-y += F12NbPowerGate.c -libagesa-y += F12NbServices.c -libagesa-y += F12NbSmu.c diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h deleted file mode 100644 index 483bcf3613..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h +++ /dev/null @@ -1,114 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Family specific service routine - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 47475 $ @e \$Date: 2011-02-22 11:28:52 +0800 (Tue, 22 Feb 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBFAMILYSERVICES_H_ -#define _NBFAMILYSERVICES_H_ - -/// Fuse field entry -typedef struct { - UINT8 FieldOffset; ///< Field offset in fuse register - UINT8 FieldWidth; ///< Width of field - UINT16 FuseOffset; ///< destination offset in translation table -} FUSE_REGISTER_ENTRY; - -/// Fuse register entry -typedef struct { - UINT32 Register; ///< FCR register address - UINT8 FuseRegisterTableLength; ///< Length of field table for this register - FUSE_REGISTER_ENTRY *FuseRegisterTable; ///< Pointer to field table -} FUSE_TABLE_ENTRY; - -/// Fuse translation table -typedef struct { - UINT8 FuseTableLength; ///< Length of translation table - FUSE_TABLE_ENTRY *FuseTable; ///< Pointer to register table -} FUSE_TABLE; - -/// NB power gate configuration -typedef struct { - struct { - UINT32 GmcPowerGate:1; ///< Power Gate GMC - UINT32 GfxPowerGate:1; ///< Power gate GFX - UINT32 UvdPowerGate:1; ///< Power gate UVD - } Services; ///< Power gate services - POWER_GATE_DATA Gmc; ///< Gmc Power gating Data - POWER_GATE_DATA Uvd; ///< Uvd Power gating Data -} NB_POWERGATE_CONFIG; - -VOID -NbFmNbClockGating ( - IN OUT VOID *NbClkGatingCtrl, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbFmClumpUnitID ( - IN PCI_ADDR NbPciAddress, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -FUSE_TABLE* -NbFmGetFuseTranslationTable ( - VOID - ); - -VOID -NbFmFuseAdjustFuseTablePatch ( - IN OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -UINT32 -NbFmDpmStateBootupInit ( - IN UINT32 LclkDpmValid, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -AGESA_STATUS -NbFmInitLclkDpmRcActivity ( - IN AMD_CONFIG_PARAMS *StdHeader - ); -#endif - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/Makefile.inc b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/Makefile.inc deleted file mode 100644 index fca82d5f13..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/Makefile.inc +++ /dev/null @@ -1,2 +0,0 @@ -libagesa-y += NbFuseTable.c -libagesa-y += NbLclkDpm.c diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c deleted file mode 100644 index bb9ad5ea9e..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c +++ /dev/null @@ -1,432 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fuse table initialization - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "heapManager.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbCommonLib.h" -#include "GnbNbInitLibV1.h" -#include "OptionGnb.h" -#include "GnbRegistersLN.h" -#include "NbSmuLib.h" -#include "NbConfigData.h" -#include "NbFuseTable.h" -#include "NbFamilyServices.h" -#include "GfxLib.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_FEATURE_NBFUSETABLE_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ -extern GNB_BUILD_OPTIONS GnbBuildOptions; - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -VOID -NbFuseLoadDefaultFuseTable ( - OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbFuseLoadFuseTableFromFcr ( - OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbFuseDebugDump ( - IN PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbFuseAdjustFuseTableToCurrentMainPllVco ( - IN OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -PP_FUSE_ARRAY DefaultPpFuseArray = { - 0, ///< PP table revision - {1, 0, 0, 0, 0, 0}, ///< Valid DPM states - {0x40, 0, 0, 0, 0, 0}, ///< Sclk DPM DID - {0, 0, 0, 0, 0, 0}, ///< Sclk DPM VID - {0, 0, 0, 0, 0}, ///< Sclk DPM Cac - {1, 0, 0, 0, 0, 0}, ///< State policy flags - {2, 0, 0, 0, 0, 0}, ///< State policy label - {0x40, 0, 0, 0}, ///< VCLK DID - {0x40, 0, 0, 0}, ///< DCLK DID - 0x40, ///< Thermal SCLK - {0, 0, 0, 0, 0, 0}, ///< Vclk/Dclk selector - {0, 0, 0, 0}, ///< Valid Lclk DPM states - {0, 0, 0, 0}, ///< Lclk DPM DID - {0, 0, 0, 0}, ///< Lclk DPM VID - {0, 0, 0, 0}, ///< Displclk DID - 3, ///< Pcie Gen 2 VID - 0x10, ///< Main PLL id for 3200 VCO - 0, ///< WRCK SMU clock Divisor - {0x24, 0x24, 0x24, 0x24} ///< Sclk VID -}; - - -/*----------------------------------------------------------------------------------------*/ -/** - * Fuse Table Init - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbFuseTableFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - PP_FUSE_ARRAY *PpFuseArray; - D18F3xA0_STRUCT D18F3xA0; - BOOLEAN LoadDefaultFuses; - IDS_HDT_CONSOLE (GNB_TRACE, "NbFuseTableFeature Enter\n"); - - PpFuseArray = (PP_FUSE_ARRAY *) GnbAllocateHeapBuffer (AMD_PP_FUSE_TABLE_HANDLE, sizeof (PP_FUSE_ARRAY), StdHeader); - ASSERT (PpFuseArray != NULL); - if (PpFuseArray == NULL) { - IDS_HDT_CONSOLE (GNB_TRACE, " ERROR!!! Heap Allocation\n"); - return AGESA_ERROR; - } - LibAmdMemFill (PpFuseArray, 0x00, sizeof (PP_FUSE_ARRAY), StdHeader); - GnbLibPciRead ( - MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3xA0_ADDRESS), - AccessWidth32, - &D18F3xA0.Value, - StdHeader - ); - - LoadDefaultFuses = TRUE; - if (GnbBuildOptions.GnbLoadRealFuseTable == 1) { - if (D18F3xA0.Field.CofVidProg == 1) { - IDS_HDT_CONSOLE (NB_MISC, " Processor Fused\n"); - NbFuseLoadFuseTableFromFcr (PpFuseArray, StdHeader); - if (PpFuseArray->PPlayTableRev != 0) { - LoadDefaultFuses = FALSE; - } else { - IDS_HDT_CONSOLE (NB_MISC, " PowerPlay Table Unfused\n"); - } - } else { - IDS_HDT_CONSOLE (NB_MISC, " Processor Unfuse\n"); - } - } else { - IDS_HDT_CONSOLE (NB_MISC, " Force default fuse table Unfuse\n"); - } - - if (LoadDefaultFuses) { - IDS_HDT_CONSOLE (NB_MISC, " Load default fuses\n"); - NbFuseLoadDefaultFuseTable (PpFuseArray, StdHeader); - } - NbFmFuseAdjustFuseTablePatch (PpFuseArray, StdHeader); - NbFuseAdjustFuseTableToCurrentMainPllVco (PpFuseArray, StdHeader); - IDS_OPTION_CALLOUT (IDS_CALLOUT_GNB_PPFUSE_OVERRIDE, PpFuseArray, StdHeader); - GNB_DEBUG_CODE ( - NbFuseDebugDump (PpFuseArray, StdHeader) - ); - IDS_HDT_CONSOLE (GNB_TRACE, "NbFuseTableFeature Exit\n"); - return AGESA_SUCCESS; -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * Load Fuse Table From FCRs - * - * - * @param[out] PpFuseArray Pointer to save fuse table - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -VOID -NbFuseLoadFuseTableFromFcr ( - OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - FUSE_TABLE *FuseTable; - UINTN RegisterIndex; - FuseTable = NbFmGetFuseTranslationTable (); - for (RegisterIndex = 0; RegisterIndex < FuseTable->FuseTableLength; RegisterIndex++ ) { - UINTN FieldIndex; - UINTN FuseRegisterTableLength; - UINT32 FuseValue; - FuseRegisterTableLength = FuseTable->FuseTable[RegisterIndex].FuseRegisterTableLength; - FuseValue = NbSmuReadEfuse ( - FuseTable->FuseTable[RegisterIndex].Register, - StdHeader - ); - for (FieldIndex = 0; FieldIndex < FuseRegisterTableLength; FieldIndex++) { - FUSE_REGISTER_ENTRY RegisterEntry; - UINT8 *FuseArrayPtr; - UINT32 FuseArrauValue; - RegisterEntry = FuseTable->FuseTable[RegisterIndex].FuseRegisterTable[FieldIndex]; - FuseArrayPtr = (UINT8*) PpFuseArray + RegisterEntry.FuseOffset; - FuseArrauValue = (FuseValue >> RegisterEntry.FieldOffset) & ((1 << RegisterEntry.FieldWidth) - 1); - if (RegisterEntry.FieldWidth > 16) { - *((UINT32 *) FuseArrayPtr) = FuseArrauValue; - } else if (RegisterEntry.FieldWidth > 8) { - *((UINT16 *) FuseArrayPtr) = (UINT16) FuseArrauValue; - } else { - *((UINT8 *) FuseArrayPtr) = (UINT8) FuseArrauValue; - } - } - } -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Load Default Fuse Table - * - * - * @param[out] PpFuseArray Pointer to save fuse table - * @param[in] StdHeader Pointer to Standard configuration - * @retval AGESA_STATUS - */ - -VOID -NbFuseLoadDefaultFuseTable ( - OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - D18F3x15C_STRUCT D18F3x15C; - UINT8 MaxVidIndex; - LibAmdMemCopy (PpFuseArray, &DefaultPpFuseArray, sizeof (PP_FUSE_ARRAY), StdHeader); - GnbLibPciRead ( - MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3x15C_ADDRESS), - AccessWidth32, - &D18F3x15C.Value, - StdHeader - ); - if (D18F3x15C.Value == 0) { - D18F3x15C.Value = 0x24242424; - GnbLibPciWrite ( - MAKE_SBDFO ( 0, 0, 0x18, 3, D18F3x15C_ADDRESS), - AccessWidth32, - &D18F3x15C.Value, - StdHeader - ); - } - MaxVidIndex = GnbLocateHighestVidIndex (StdHeader); - PpFuseArray->SclkDpmVid[0] = MaxVidIndex; - PpFuseArray->PcieGen2Vid = MaxVidIndex; - -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Adjust DIDs to current main PLL VCO - * - * Main PLL VCO can be changed for debug perpouses - * - * @param[in,out] PpFuseArray Pointer to save fuse table - * @param[in] StdHeader Pointer to Standard configuration - */ - -VOID -NbFuseAdjustFuseTableToCurrentMainPllVco ( - IN OUT PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 EffectiveMainPllFreq10KHz; - UINT32 FusedMainPllFreq10KHz; - UINT32 TempVco; - UINTN Index; - EffectiveMainPllFreq10KHz = GfxLibGetMainPllFreq (StdHeader) * 100; - FusedMainPllFreq10KHz = (PpFuseArray->MainPllId + 0x10) * 100 * 100; - if (FusedMainPllFreq10KHz != EffectiveMainPllFreq10KHz) { - IDS_HDT_CONSOLE (NB_MISC, " WARNING! Adjusting fuse table for reprogrammed VCO \n"); - IDS_HDT_CONSOLE (NB_MISC, " Actual main Freq %d \n", EffectiveMainPllFreq10KHz); - IDS_HDT_CONSOLE (NB_MISC, " Fused main Freq %d \n", FusedMainPllFreq10KHz); - for (Index = 0; Index < 5; Index++) { - if (PpFuseArray->SclkDpmDid[Index] != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->SclkDpmDid[Index], FusedMainPllFreq10KHz); - PpFuseArray->SclkDpmDid[Index] = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - } - for (Index = 0; Index < 4; Index++) { - if (PpFuseArray->VclkDid[Index] != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->VclkDid[Index], FusedMainPllFreq10KHz); - PpFuseArray->VclkDid[Index] = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - if (PpFuseArray->DclkDid[Index] != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->DclkDid[Index], FusedMainPllFreq10KHz); - PpFuseArray->DclkDid[Index] = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - if (PpFuseArray->LclkDpmDid[Index] != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->LclkDpmDid[Index], FusedMainPllFreq10KHz); - PpFuseArray->LclkDpmDid[Index] = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - if (PpFuseArray->DisplclkDid[Index] != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->DisplclkDid[Index], FusedMainPllFreq10KHz); - PpFuseArray->DisplclkDid[Index] = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - } - if (PpFuseArray->SclkThermDid != 0) { - TempVco = GfxLibCalculateClk (PpFuseArray->SclkThermDid , FusedMainPllFreq10KHz); - PpFuseArray->SclkThermDid = GfxLibCalculateDid (TempVco, EffectiveMainPllFreq10KHz); - } - } -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Debug dump fuse table - * - * - * @param[out] PpFuseArray Pointer to save fuse table - * @param[in] StdHeader Pointer to Standard configuration - */ - -VOID -NbFuseDebugDump ( - IN PP_FUSE_ARRAY *PpFuseArray, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINTN Index; - UINT32 EffectiveMainPllFreq10KHz; - - EffectiveMainPllFreq10KHz = GfxLibGetMainPllFreq (StdHeader) * 100; - IDS_HDT_CONSOLE (NB_MISC, "<------------ GNB FUSE TABLE------------>\n"); - for (Index = 0; Index < 4; Index++) { - if (PpFuseArray->LclkDpmValid[Index] != 0) { - IDS_HDT_CONSOLE ( - NB_MISC, - " LCLK DID[%d] - 0x%02x (%dMHz)\n", - Index, - PpFuseArray->LclkDpmDid[Index], - GfxLibCalculateClk (PpFuseArray->LclkDpmDid[Index], EffectiveMainPllFreq10KHz) / 100); - IDS_HDT_CONSOLE (NB_MISC, " LCLK VID[%d] - 0x02%x\n", Index, PpFuseArray->LclkDpmVid[Index]); - } - } - for (Index = 0; Index < 4; Index++) { - IDS_HDT_CONSOLE ( - NB_MISC, - " VCLK DID[%d] - 0x%02x (%dMHz)\n", - Index, - PpFuseArray->VclkDid[Index], - (PpFuseArray->VclkDid[Index] != 0) ? (GfxLibCalculateClk (PpFuseArray->VclkDid[Index], EffectiveMainPllFreq10KHz) / 100) : 0 - ); - IDS_HDT_CONSOLE ( - NB_MISC, - " DCLK DID[%d] - 0x%02x (%dMHz)\n", - Index, - PpFuseArray->DclkDid[Index], - (PpFuseArray->DclkDid[Index] != 0) ? (GfxLibCalculateClk (PpFuseArray->DclkDid[Index], EffectiveMainPllFreq10KHz) / 100) : 0 - ); - } - for (Index = 0; Index < 4; Index++) { - IDS_HDT_CONSOLE ( - NB_MISC, - " DISPCLK DID[%d] - 0x%02x (%dMHz)\n", - Index, - PpFuseArray->DisplclkDid[Index], - (PpFuseArray->DisplclkDid[Index] != 0) ? (GfxLibCalculateClk (PpFuseArray->DisplclkDid[Index], EffectiveMainPllFreq10KHz) / 100) : 0 - ); - } - for (Index = 0; Index < 6; Index++) { - IDS_HDT_CONSOLE ( - NB_MISC, - " SCLK DID[%d] - 0x%02x (%dMHz)\n", - Index, - PpFuseArray->SclkDpmDid[Index], - (PpFuseArray->SclkDpmDid[Index] != 0) ? (GfxLibCalculateClk (PpFuseArray->SclkDpmDid[Index], EffectiveMainPllFreq10KHz) / 100) : 0 - ); - IDS_HDT_CONSOLE ( - NB_MISC, - " SCLK TDP[%d] - 0x%x \n", - Index, - PpFuseArray->SclkDpmTdpLimit[Index] - ); - IDS_HDT_CONSOLE (NB_MISC, " SCLK VID[%d] - 0x%02x\n", Index, PpFuseArray->SclkDpmVid[Index]); - } - for (Index = 0; Index < 6; Index++) { - IDS_HDT_CONSOLE (NB_MISC, " State #%d\n", Index); - IDS_HDT_CONSOLE (NB_MISC, " Policy Label - 0x%x\n", PpFuseArray->PolicyLabel[Index]); - IDS_HDT_CONSOLE (NB_MISC, " Policy Flag - 0x%x\n", PpFuseArray->PolicyFlags[Index]); - IDS_HDT_CONSOLE (NB_MISC, " Valid SCLK - 0x%x\n", PpFuseArray->SclkDpmValid[Index]); - IDS_HDT_CONSOLE (NB_MISC, " Vclk/Dclk Index - 0x%x\n", PpFuseArray->VclkDclkSel[Index]); - } - IDS_HDT_CONSOLE (NB_MISC, " GEN2 VID - 0x%x\n", PpFuseArray->PcieGen2Vid); - IDS_HDT_CONSOLE (NB_MISC, " Main PLL Id - 0x%x\n", PpFuseArray->MainPllId); - IDS_HDT_CONSOLE (NB_MISC, " GpuBoostCap - %x\n", PpFuseArray->GpuBoostCap); - IDS_HDT_CONSOLE (NB_MISC, " SclkDpmBoostMargin - %x\n", PpFuseArray->SclkDpmBoostMargin); - IDS_HDT_CONSOLE (NB_MISC, " SclkDpmThrottleMargin - %x\n", PpFuseArray->SclkDpmThrottleMargin); - IDS_HDT_CONSOLE (NB_MISC, " SclkDpmTdpLimitPG - %x\n", PpFuseArray->SclkDpmTdpLimitPG); - IDS_HDT_CONSOLE ( - NB_MISC, " SclkThermDid - %x(%dMHz)\n", - PpFuseArray->SclkThermDid, - (PpFuseArray->SclkThermDid != 0) ? (GfxLibCalculateClk (PpFuseArray->SclkThermDid, EffectiveMainPllFreq10KHz) / 100) : 0 - ); - IDS_HDT_CONSOLE (NB_MISC, "<------------ GNB FUSE END-------------->\n"); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h deleted file mode 100644 index e1415193a2..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h +++ /dev/null @@ -1,53 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fuse table initialization - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ -#ifndef _NBFUSETABLE_H_ -#define _NBFUSETABLE_H_ - -AGESA_STATUS -NbFuseTableFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c deleted file mode 100644 index 541880e806..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c +++ /dev/null @@ -1,108 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * LCLK DPM initialization - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "heapManager.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbCommonLib.h" -#include "GnbRegistersLN.h" -#include "OptionGnb.h" -#include "GfxLib.h" -#include "NbConfigData.h" -#include "NbSmuLib.h" -#include "NbLclkDpm.h" -#include "NbFamilyServices.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_FEATURE_NBLCLKDPM_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -extern GNB_BUILD_OPTIONS GnbBuildOptions; -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - - -/*----------------------------------------------------------------------------------------*/ -/** - * LCLK DPM init - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval Initialization status - */ - -AGESA_STATUS -NbLclkDpmFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - IDS_HDT_CONSOLE (GNB_TRACE, "NbLclkDpmFeature Enter\n"); - - Status = NbFmInitLclkDpmRcActivity (StdHeader); - - IDS_HDT_CONSOLE (GNB_TRACE, "NbLclkDpmFeature Exit [0x%x]\n", Status); - return Status; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h deleted file mode 100644 index 41c95fb73c..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h +++ /dev/null @@ -1,54 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB Lclk DPM - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 47050 $ @e \$Date: 2011-02-15 05:50:36 +0800 (Tue, 15 Feb 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBLCLKDPM_H_ -#define _NBLCLKDPM_H_ - -AGESA_STATUS -NbLclkDpmFeature ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Makefile.inc b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Makefile.inc deleted file mode 100644 index 578c5f857c..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Makefile.inc +++ /dev/null @@ -1,9 +0,0 @@ -libagesa-y += NbConfigData.c -libagesa-y += NbInit.c -libagesa-y += NbInitAtEarly.c -libagesa-y += NbInitAtEnv.c -libagesa-y += NbInitAtLatePost.c -libagesa-y += NbInitAtPost.c -libagesa-y += NbInitAtReset.c -libagesa-y += NbPowerMgmt.c -libagesa-y += NbSmuLib.c diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c deleted file mode 100644 index c24cac7a40..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c +++ /dev/null @@ -1,94 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Initialize NB configuration data structure. - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "NbConfigData.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBCONFIGDATA_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*----------------------------------------------------------------------------------------*/ -/** - * Create configuration data - * - * - * @param[in] StdHeader Standard configuration header - * @param[in] Gnb Pointer to global Gnb configuration - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbAllocateConfigData ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - AGESA_STATUS Status; - Status = AGESA_SUCCESS; - Gnb->StdHeader = StdHeader; - return Status; -}
\ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h deleted file mode 100644 index 56fce0d805..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h +++ /dev/null @@ -1,68 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Initialize NB configuration data structure. - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBCONFIGDATA_H_ -#define _NBCONFIGDATA_H_ - -/// NB register entry -typedef struct { - UINT16 Reg; ///< Register address - UINT32 Mask; ///< Mask - UINT32 Data; ///< Data -} NB_REGISTER_ENTRY; - -/// GNB Platform Configuration -typedef struct { - AMD_CONFIG_PARAMS *StdHeader; ///< Standard configuration header - PCI_ADDR GnbPciAddress; ///< PCI Address -} GNB_PLATFORM_CONFIG; - -AGESA_STATUS -NbAllocateConfigData ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c deleted file mode 100644 index 0e44ebb196..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c +++ /dev/null @@ -1,233 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Various NB initialization services - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48952 $ @e \$Date: 2011-03-15 06:45:49 +0800 (Tue, 15 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbCommonLib.h" -#include "GnbGfxInitLibV1.h" -#include "NbSmuLib.h" -#include "NbConfigData.h" -#include "GnbRegistersLN.h" -#include "NbInit.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBINIT_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -CONST NB_REGISTER_ENTRY NbPciInitTable [] = { - { - D0F0x04_ADDRESS, - 0xffffffff, - (0x1 << D0F0x04_MemAccessEn_WIDTH) | (0x1 << D0F0x04_BusMasterEn_OFFSET) - }, - { - D0F0x4C_ADDRESS, - ~(UINT32)(0x3ull << D0F0x4C_CfgRdTime_OFFSET), - 0x2 << D0F0x4C_CfgRdTime_OFFSET - }, - { - D0F0x84_ADDRESS, - ~(UINT32)(0x1ull << D0F0x84_Ev6Mode_OFFSET), - 0x1 << D0F0x84_Ev6Mode_OFFSET - } -}; - -CONST NB_REGISTER_ENTRY NbMiscInitTable [] = { - { - D0F0x64_x46_ADDRESS, - ~(UINT32)(0x3ull << D0F0x64_x46_P2PMode_OFFSET), - 1 << D0F0x64_x46_Msi64bitEn_OFFSET - } -}; - - -CONST NB_REGISTER_ENTRY NbOrbInitTable [] = { - { - D0F0x98_x07_ADDRESS, - 0xffffffff, - (1 << D0F0x98_x07_IocBwOptEn_OFFSET) | - (1 << D0F0x98_x07_MSIHTIntConversionEn_OFFSET) | - (1 << D0F0x98_x07_DropZeroMaskWrEn_OFFSET) - }, - { - D0F0x98_x08_ADDRESS, - ~(UINT32)(0xffull << D0F0x98_x08_NpWrrLenC_OFFSET), - 1 << D0F0x98_x08_NpWrrLenC_OFFSET - }, - { - D0F0x98_x09_ADDRESS, - ~(UINT32)(0xffull << D0F0x98_x09_PWrrLenD_OFFSET), - 1 << D0F0x98_x09_PWrrLenD_OFFSET - }, - { - D0F0x98_x0C_ADDRESS, - 0xffffffff, - 1 << D0F0x98_x0C_StrictSelWinnerEn_OFFSET - }, - { - D0F0x98_x0E_ADDRESS, - 0xffffffff, - 1 << D0F0x98_x0E_MsiHtRsvIntRemapEn_OFFSET - }, - { - D0F0x98_x28_ADDRESS, - 0xffffffff, - (1 << D0F0x98_x28_SmuPmInterfaceEn_OFFSET) | - (1 << D0F0x98_x28_ForceCoherentIntr_OFFSET) - } -}; - - -/*----------------------------------------------------------------------------------------*/ -/** - * Init NB at Power On - * - * - * - * @param[in] Gnb Pointer to global Gnb configuration - * @retval AGESA_STATUS - */ - - -AGESA_STATUS -NbInitOnPowerOn ( - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - UINTN Index; - FCRxFF30_0398_STRUCT FCRxFF30_0398; - UINT32 Value; - - // Init NBCONFIG - for (Index = 0; Index < (sizeof (NbPciInitTable) / sizeof (NB_REGISTER_ENTRY)); Index++) { - GnbLibPciRMW ( - Gnb->GnbPciAddress.AddressValue | NbPciInitTable[Index].Reg, - AccessWidth32, - NbPciInitTable[Index].Mask, - NbPciInitTable[Index].Data, - Gnb->StdHeader - ); - } - - // Init MISCIND - for (Index = 0; Index < (sizeof (NbMiscInitTable) / sizeof (NB_REGISTER_ENTRY)); Index++) { - GnbLibPciIndirectRMW ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - NbMiscInitTable[Index].Reg | IOC_WRITE_ENABLE, - AccessWidth32, - NbMiscInitTable[Index].Mask, - NbMiscInitTable[Index].Data, - Gnb->StdHeader - ); - } - - // Init ORB - for (Index = 0; Index < (sizeof (NbOrbInitTable) / sizeof (NB_REGISTER_ENTRY)); Index++) { - GnbLibPciIndirectRMW ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - NbOrbInitTable[Index].Reg | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessWidth32, - NbOrbInitTable[Index].Mask, - NbOrbInitTable[Index].Data, - Gnb->StdHeader - ); - } - if (!GfxLibIsControllerPresent (Gnb->StdHeader)) { - FCRxFF30_0398.Value = (1 << FCRxFF30_0398_SoftResetGrbm_OFFSET) | (1 << FCRxFF30_0398_SoftResetMc_OFFSET) | - (1 << FCRxFF30_0398_SoftResetDc_OFFSET) | (1 << FCRxFF30_0398_SoftResetRlc_OFFSET) | - (1 << FCRxFF30_0398_SoftResetUvd_OFFSET); - NbSmuSrbmRegisterWrite (FCRxFF30_0398_ADDRESS, &FCRxFF30_0398.Value, FALSE, Gnb->StdHeader); - } - - Value = 0; - for (Index = 0x8400; Index <= 0x85AC; Index = Index + 4) { - NbSmuRcuRegisterWrite ( - (UINT16) Index, - &Value, - 1, - FALSE, - Gnb->StdHeader - ); - } - - NbSmuRcuRegisterWrite ( - 0x9000, - &Value, - 1, - FALSE, - Gnb->StdHeader - ); - - NbSmuRcuRegisterWrite ( - 0x9004, - &Value, - 1, - FALSE, - Gnb->StdHeader - ); - - return AGESA_SUCCESS; -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h deleted file mode 100644 index 5f5504b956..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h +++ /dev/null @@ -1,54 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Various NB initialization services - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBINIT_H_ -#define _NBINIT_H_ - -AGESA_STATUS -NbInitOnPowerOn ( - IN GNB_PLATFORM_CONFIG *Gnb - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c deleted file mode 100644 index 4b997c451b..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c +++ /dev/null @@ -1,122 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB early initialization interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbCommonLib.h" -#include "GnbNbInitLibV1.h" -#include "NbConfigData.h" -#include "NbInit.h" -#include "NbInitAtEarly.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBINITATEARLY_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - - - -/*----------------------------------------------------------------------------------------*/ -/** - * Init GNB at Reset - * - * - * - * @param[in] StdHeader Standard configuration header - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbInitAtEarly ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - AGESA_STATUS AgesaStatus; - GNB_PLATFORM_CONFIG Gnb; - UINT32 NumberOfSockets; - UINT32 SocketId; - AgesaStatus = AGESA_SUCCESS; - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtEarly Enter\n"); - NbAllocateConfigData (StdHeader, &Gnb); - NumberOfSockets = GnbGetNumberOfSockets (StdHeader); - for (SocketId = 0; SocketId < NumberOfSockets; SocketId++) { - UINT32 NumberOfSilicons; - UINT32 SiliconId; - if (!GnbIsDevicePresentInSocket (SocketId, StdHeader)) { - continue; - } - NumberOfSilicons = GnbGetNumberOfSiliconsOnSocket (SocketId, StdHeader); - for (SiliconId = 0; SiliconId < NumberOfSilicons; SiliconId++) { - Gnb.GnbPciAddress = GnbGetPciAddress (SocketId, SiliconId, StdHeader); - Status = NbInitOnPowerOn (&Gnb); - AGESA_STATUS_UPDATE (Status, AgesaStatus); - ASSERT (Status == AGESA_SUCCESS); - } - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtEarly Exit[0x%x]\n", AgesaStatus); - return AgesaStatus; -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h deleted file mode 100644 index 9cd9dd9c00..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h +++ /dev/null @@ -1,53 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB early initialization interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: - * @e sub-project: - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ -#ifndef _NBINITATRESET_H_ -#define _NBINITATRESET_H_ - -AGESA_STATUS -NbInitAtEarly ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c deleted file mode 100644 index 55784698d8..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c +++ /dev/null @@ -1,123 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB init at ENV interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbCommonLib.h" -#include "GnbNbInitLibV1.h" -#include "NbConfigData.h" -#include "NbFamilyServices.h" -#include "NbInitAtEnv.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBINITATENV_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*----------------------------------------------------------------------------------------*/ -/** - * Init GNB at ENV - * - * - * - * @param[in] StdHeader Standard configuration header - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbInitAtEnv ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - AGESA_STATUS AgesaStatus; - GNB_PLATFORM_CONFIG Gnb; - UINT32 NumberOfSockets; - UINT32 SocketId; - AgesaStatus = AGESA_SUCCESS; - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtEnv Enter\n"); - NbAllocateConfigData (StdHeader, &Gnb); - NumberOfSockets = GnbGetNumberOfSockets (StdHeader); - for (SocketId = 0; SocketId < NumberOfSockets; SocketId++) { - UINT32 NumberOfSilicons; - UINT32 SiliconId; - if (!GnbIsDevicePresentInSocket (SocketId, StdHeader)) { - continue; - } - NumberOfSilicons = GnbGetNumberOfSiliconsOnSocket (SocketId, StdHeader); - for (SiliconId = 0; SiliconId < NumberOfSilicons; SiliconId++) { - Gnb.GnbPciAddress = GnbGetPciAddress (SocketId, SiliconId, StdHeader); - GnbLpcDmaDeadlockPrevention (Gnb.GnbPciAddress, StdHeader); - Status = GnbSetTom (Gnb.GnbPciAddress, StdHeader); - AGESA_STATUS_UPDATE (Status, AgesaStatus); - ASSERT (Status == AGESA_SUCCESS); - NbFmClumpUnitID (Gnb.GnbPciAddress, StdHeader); - GnbOrbDynamicWake (Gnb.GnbPciAddress, StdHeader); - } - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtEnv Exit[0x%x]\n", AgesaStatus); - return AgesaStatus; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h deleted file mode 100644 index 9e6bb70017..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h +++ /dev/null @@ -1,57 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB post init interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBINITATENV_H_ -#define _NBINITATENV_H_ - -AGESA_STATUS -NbInitAtEnv ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif - - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c deleted file mode 100644 index 27135cd608..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c +++ /dev/null @@ -1,121 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB late POST init interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: - * @e sub-project: - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbCommonLib.h" -#include "GnbNbInitLibV1.h" -#include "NbConfigData.h" -#include "NbPowerMgmt.h" -#include "NbInitAtLatePost.h" -#include "Filecode.h" - -#define FILECODE PROC_GNB_NB_NBINITATLATEPOST_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - -/*----------------------------------------------------------------------------------------*/ -/** - * Init GNB at Late Post - * - * - * - * @param[in] StdHeader Standard configuration header - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbInitAtLatePost ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - AGESA_STATUS AgesaStatus; - GNB_PLATFORM_CONFIG Gnb; - UINT32 NumberOfSockets; - UINT32 SocketId; - AgesaStatus = AGESA_SUCCESS; - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtLatePost Enter\n"); - Status = NbAllocateConfigData (StdHeader, &Gnb); - AGESA_STATUS_UPDATE (Status, AgesaStatus); - NumberOfSockets = GnbGetNumberOfSockets (StdHeader); - for (SocketId = 0; SocketId < NumberOfSockets; SocketId++) { - UINT32 NumberOfSilicons; - UINT32 SiliconId; - if (!GnbIsDevicePresentInSocket (SocketId, StdHeader)) { - continue; - } - NumberOfSilicons = GnbGetNumberOfSiliconsOnSocket (SocketId, StdHeader); - for (SiliconId = 0; SiliconId < NumberOfSilicons; SiliconId++) { - Gnb.GnbPciAddress = GnbGetPciAddress (SocketId, SiliconId, StdHeader); - Status = NbInitPowerManagement (&Gnb); - AGESA_STATUS_UPDATE (Status, AgesaStatus); - GnbLock (Gnb.GnbPciAddress, StdHeader); - } - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtLatePost Exit[0x%x]\n", Status); - return Status; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h deleted file mode 100644 index fde262ff9c..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h +++ /dev/null @@ -1,55 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB late POST init interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: - * @e sub-project: - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBINITATLATEPOST_H_ -#define _NBINITATLATEPOST_H_ - -AGESA_STATUS -NbInitAtLatePost ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c deleted file mode 100644 index aee9193a38..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c +++ /dev/null @@ -1,121 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB Post initialization interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbCommonLib.h" -#include "GnbNbInitLibV1.h" -#include "NbConfigData.h" -#include "NbInitAtPost.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBINITATPOST_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - - - -/*----------------------------------------------------------------------------------------*/ -/** - * Init NB at POST - * - * - * - * @param[in] StdHeader Standard configuration header - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbInitAtPost ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - AGESA_STATUS AgesaStatus; - GNB_PLATFORM_CONFIG Gnb; - UINT32 NumberOfSockets; - UINT32 SocketId; - AgesaStatus = AGESA_SUCCESS; - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtPost Enter\n"); - NbAllocateConfigData (StdHeader, &Gnb); - NumberOfSockets = GnbGetNumberOfSockets (StdHeader); - for (SocketId = 0; SocketId < NumberOfSockets; SocketId++) { - UINT32 NumberOfSilicons; - UINT32 SiliconId; - if (!GnbIsDevicePresentInSocket (SocketId, StdHeader)) { - continue; - } - NumberOfSilicons = GnbGetNumberOfSiliconsOnSocket (SocketId, StdHeader); - for (SiliconId = 0; SiliconId < NumberOfSilicons; SiliconId++) { - Gnb.GnbPciAddress = GnbGetPciAddress (SocketId, SiliconId, StdHeader); - Status = GnbSetTom (Gnb.GnbPciAddress, StdHeader); - AGESA_STATUS_UPDATE (Status, AgesaStatus); - ASSERT (Status == AGESA_SUCCESS); - } - } - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitAtPost Exit[0x%x]\n", AgesaStatus); - return AgesaStatus; -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h deleted file mode 100644 index 76ce8e0399..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h +++ /dev/null @@ -1,53 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB Post initialization interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: - * @e sub-project: - * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ -#ifndef _NBINITATPOST_H_ -#define _NBINITATPOST_H_ - -AGESA_STATUS -NbInitAtPost ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c deleted file mode 100644 index 84f12d7141..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c +++ /dev/null @@ -1,95 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB reset init interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "NbInitAtReset.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBINITATRESET_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ - - - -/*----------------------------------------------------------------------------------------*/ -/** - * Init GNB at Reset - * - * - * - * @param[in] StdHeader Standard configuration header - * @retval AGESA_STATUS - */ - -AGESA_STATUS -NbInitAtReset ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - AGESA_STATUS Status; - Status = AGESA_SUCCESS; - return Status; -}
\ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h deleted file mode 100644 index d05ff351fd..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h +++ /dev/null @@ -1,53 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB reset init interface - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: - * @e sub-project: - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ -#ifndef _NBINITATRESET_H_ -#define _NBINITATRESET_H_ - -AGESA_STATUS -NbInitAtReset ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c deleted file mode 100644 index 2afca26015..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c +++ /dev/null @@ -1,647 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB power management features - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48978 $ @e \$Date: 2011-03-15 13:53:53 +0800 (Tue, 15 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbFuseTable.h" -#include "GnbGfx.h" -#include "GnbPcie.h" -#include "GnbCommonLib.h" -#include "GnbGfxInitLibV1.h" -#include "NbConfigData.h" -#include "NbSmuLib.h" -#include "NbFamilyServices.h" -#include "NbPowerMgmt.h" -#include "OptionGnb.h" -#include "GfxLib.h" -#include "GnbRegistersLN.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBPOWERMGMT_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ -extern GNB_BUILD_OPTIONS GnbBuildOptions; - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- -*/ - -VOID -NbInitLclkDeepSleep ( - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitClockGating ( - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitSmuClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitOrbClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitIocClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitBifClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitGmcClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitDceSclkClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -VOID -NbInitDceDisplayClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ); - -/*----------------------------------------------------------------------------------------*/ -/** - * Init various power management features - * - * - * - * @param[in] Gnb Pointer to global Gnb configuration - * @retval AGESA_SUCCESS LCLK DPM initialization success - * @retval AGESA_ERROR LCLK DPM initialization error - */ - -AGESA_STATUS -NbInitPowerManagement ( - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - AGESA_STATUS Status; - Status = AGESA_SUCCESS; - NbInitLclkDeepSleep (Gnb); - NbInitClockGating (Gnb); - return Status; -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * Init NB LCLK Deep Sleep - * - * - * - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitLclkDeepSleep ( - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - SMUx1B_STRUCT SMUx1B; - SMUx1D_STRUCT SMUx1D; - UINT32 LclkDpSlpEn; - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitLclkDeepSleep Enter\n"); - LclkDpSlpEn = GnbBuildOptions.LclkDeepSleepEn ? 1 : 0; - NbSmuIndirectRead (SMUx1B_ADDRESS, AccessWidth16, &SMUx1B.Value, Gnb->StdHeader); - NbSmuIndirectRead (SMUx1D_ADDRESS, AccessWidth16, &SMUx1D.Value, Gnb->StdHeader); - SMUx1B.Field.LclkDpSlpDiv = 5; - SMUx1B.Field.LclkDpSlpMask = (GfxLibIsControllerPresent (Gnb->StdHeader) ? (0xFF) : 0xEF); - SMUx1B.Field.RampDis = 0; - SMUx1D.Field.LclkDpSlpHyst = 0xf; - SMUx1D.Field.LclkDpSlpEn = LclkDpSlpEn; - IDS_HDT_CONSOLE (GNB_TRACE, " LCLK Deep Sleep [%s]\n", (LclkDpSlpEn != 0) ? "Enabled" : "Disabled"); - NbSmuIndirectWrite (SMUx1B_ADDRESS, AccessS3SaveWidth16, &SMUx1B.Value, Gnb->StdHeader); - NbSmuIndirectWrite (SMUx1D_ADDRESS, AccessS3SaveWidth16, &SMUx1D.Value, Gnb->StdHeader); - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitLclkDeepSleep Exit\n"); -} - -/** - * Init NB SMU clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitSmuClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Smu_Lclk_Gating; - BOOLEAN Smu_Sclk_Gating; - SMUx73_STRUCT SMUx73; - UINT32 Value; - - Smu_Lclk_Gating = NbClkGatingCtrl->Smu_Lclk_Gating; - Smu_Sclk_Gating = NbClkGatingCtrl->Smu_Sclk_Gating; -//SMUx6F - Value = 0x006001F0; - NbSmuIndirectWrite (SMUx6F_ADDRESS, AccessS3SaveWidth32, &Value, Gnb->StdHeader); -//SMUx71 - Value = 0x007001F0; - NbSmuIndirectWrite (SMUx71_ADDRESS, AccessS3SaveWidth32, &Value, Gnb->StdHeader); -//SMUx73 - NbSmuIndirectRead (SMUx73_ADDRESS, AccessWidth16, &SMUx73.Value, Gnb->StdHeader); - SMUx73.Field.DisLclkGating = Smu_Lclk_Gating ? 0 : 1; - SMUx73.Field.DisSclkGating = Smu_Sclk_Gating ? 0 : 1; - NbSmuIndirectWrite (SMUx73_ADDRESS, AccessS3SaveWidth16, &SMUx73.Value, Gnb->StdHeader); - -} - -/** - * Init NB ORB clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitOrbClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Orb_Sclk_Gating; - BOOLEAN Orb_Lclk_Gating; - D0F0x98_x49_STRUCT D0F0x98_x49; - D0F0x98_x4A_STRUCT D0F0x98_x4A; - D0F0x98_x4B_STRUCT D0F0x98_x4B; - FCRxFF30_01F5_STRUCT FCRxFF30_01F5; - - Orb_Sclk_Gating = NbClkGatingCtrl->Orb_Sclk_Gating; - Orb_Lclk_Gating = NbClkGatingCtrl->Orb_Lclk_Gating; - - // ORB clock gating (Lclk) -//D0F0x98_x4[A:9] - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x49_ADDRESS, - AccessWidth32, - &D0F0x98_x49.Value, - Gnb->StdHeader - ); - - D0F0x98_x49.Field.SoftOverrideClk6 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk5 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk4 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk3 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk2 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk1 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x49.Field.SoftOverrideClk0 = Orb_Lclk_Gating ? 0 : 1; - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x49_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessS3SaveWidth32, - &D0F0x98_x49.Value, - Gnb->StdHeader - ); - - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x4A_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessWidth32, - &D0F0x98_x4A.Value, - Gnb->StdHeader - ); - - D0F0x98_x4A.Field.SoftOverrideClk6 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk5 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk4 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk3 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk2 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk1 = Orb_Lclk_Gating ? 0 : 1; - D0F0x98_x4A.Field.SoftOverrideClk0 = Orb_Lclk_Gating ? 0 : 1; - - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x4A_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessS3SaveWidth32, - &D0F0x98_x4A.Value, - Gnb->StdHeader - ); - -//D0F0x98_x4B - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x4B_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessWidth32, - &D0F0x98_x4B.Value, - Gnb->StdHeader - ); - - D0F0x98_x4B.Field.SoftOverrideClk = Orb_Sclk_Gating ? 0 : 1; - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x94_ADDRESS, - D0F0x98_x4B_ADDRESS | (1 << D0F0x94_OrbIndWrEn_OFFSET), - AccessS3SaveWidth32, - &D0F0x98_x4B.Value, - Gnb->StdHeader - ); - -//FCRxFF30_01F5[CgOrbCgttLclkOverride, CgOrbCgttSclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader); - FCRxFF30_01F5.Field.CgOrbCgttLclkOverride = 0; - FCRxFF30_01F5.Field.CgOrbCgttSclkOverride = 0; - NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader); - -} - -/** - * Init NB IOC clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitIocClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Ioc_Lclk_Gating; - BOOLEAN Ioc_Sclk_Gating; - D0F0x64_x22_STRUCT D0F0x64_x22; - D0F0x64_x23_STRUCT D0F0x64_x23; - D0F0x64_x24_STRUCT D0F0x64_x24; - FCRxFF30_01F5_STRUCT FCRxFF30_01F5; - - Ioc_Lclk_Gating = NbClkGatingCtrl->Ioc_Lclk_Gating; - Ioc_Sclk_Gating = NbClkGatingCtrl->Ioc_Sclk_Gating; - -//D0F0x64_x22 - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x22_ADDRESS | IOC_WRITE_ENABLE, - AccessWidth32, - &D0F0x64_x22.Value, - Gnb->StdHeader - ); - - D0F0x64_x22.Field.SoftOverrideClk4 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x22.Field.SoftOverrideClk3 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x22.Field.SoftOverrideClk2 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x22.Field.SoftOverrideClk1 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x22.Field.SoftOverrideClk0 = Ioc_Lclk_Gating ? 0 : 1; - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x22_ADDRESS | IOC_WRITE_ENABLE, - AccessS3SaveWidth32, - &D0F0x64_x22.Value, - Gnb->StdHeader - ); -//D0F0x64_x23 - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x23_ADDRESS | IOC_WRITE_ENABLE, - AccessWidth32, - &D0F0x64_x23.Value, - Gnb->StdHeader - ); - - D0F0x64_x23.Field.SoftOverrideClk4 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x23.Field.SoftOverrideClk3 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x23.Field.SoftOverrideClk2 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x23.Field.SoftOverrideClk1 = Ioc_Lclk_Gating ? 0 : 1; - D0F0x64_x23.Field.SoftOverrideClk0 = Ioc_Lclk_Gating ? 0 : 1; - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x23_ADDRESS | IOC_WRITE_ENABLE, - AccessS3SaveWidth32, - &D0F0x64_x23.Value, - Gnb->StdHeader - ); - //D0F0x64_x24 - GnbLibPciIndirectRead ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x24_ADDRESS | IOC_WRITE_ENABLE, - AccessWidth32, - &D0F0x64_x24.Value, - Gnb->StdHeader - ); - - D0F0x64_x24.Field.SoftOverrideClk1 = Ioc_Sclk_Gating ? 0 : 1; - D0F0x64_x24.Field.SoftOverrideClk0 = Ioc_Sclk_Gating ? 0 : 1; - - GnbLibPciIndirectWrite ( - Gnb->GnbPciAddress.AddressValue | D0F0x60_ADDRESS, - D0F0x64_x24_ADDRESS | IOC_WRITE_ENABLE, - AccessS3SaveWidth32, - &D0F0x64_x24.Value, - Gnb->StdHeader - ); -//FCRxFF30_01F5[CgIocCgttLclkOverride, CgIocCgttSclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader); - FCRxFF30_01F5.Field.CgIocCgttLclkOverride = 0; - FCRxFF30_01F5.Field.CgIocCgttSclkOverride = 0; - NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader); -} -/** - * Init NB BIF clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitBifClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Bif_Sclk_Gating; - FCRxFF30_01F4_STRUCT FCRxFF30_01F4; - FCRxFF30_1512_STRUCT FCRxFF30_1512; - - - Bif_Sclk_Gating = NbClkGatingCtrl->Bif_Sclk_Gating; - -//FCRxFF30_01F4[CgBifCgttSclkOverride]. - NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader); - FCRxFF30_01F4.Field.CgBifCgttSclkOverride = 0; - NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader); -//FCRxFF30_1512 - NbSmuSrbmRegisterRead (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, Gnb->StdHeader); - FCRxFF30_1512.Field.SoftOverride0 = Bif_Sclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, TRUE, Gnb->StdHeader); - -} - -/** - * Init NB Gmc clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitGmcClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Gmc_Sclk_Gating; - FCRxFF30_01F4_STRUCT FCRxFF30_01F4; - FCRxFF30_01F5_STRUCT FCRxFF30_01F5; - - Gmc_Sclk_Gating = NbClkGatingCtrl->Gmc_Sclk_Gating; - -//FCRxFF30_01F4[CgMcdwCgttSclkOverride, CgMcbCgttSclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader); - FCRxFF30_01F4.Field.CgMcbCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1; - FCRxFF30_01F4.Field.CgMcdwCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader); - -//FCRxFF30_01F5[CgVmcCgttSclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader); - FCRxFF30_01F5.Field.CgVmcCgttSclkOverride = Gmc_Sclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader); - -} - -/** - * Init NB Dce Sclk clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitDceSclkClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Dce_Sclk_Gating; - FCRxFF30_0134_STRUCT FCRxFF30_0134; - FCRxFF30_01F4_STRUCT FCRxFF30_01F4; - - Dce_Sclk_Gating = NbClkGatingCtrl->Dce_Sclk_Gating; - -//GMMx4D0[SymclkbGateDisable, SymclkaGateDisable, SclkGateDisable] - NbSmuSrbmRegisterRead (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, Gnb->StdHeader); - FCRxFF30_0134.Field.SclkGateDisable = Dce_Sclk_Gating ? 0 : 1; - FCRxFF30_0134.Field.SymclkaGateDisable = Dce_Sclk_Gating ? 0 : 1; - FCRxFF30_0134.Field.SymclkbGateDisable = Dce_Sclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, TRUE, Gnb->StdHeader); - -//FCRxFF30_01F4[CgDcCgttSclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader); - FCRxFF30_01F4.Field.CgDcCgttSclkOverride = 0; - NbSmuSrbmRegisterWrite (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, TRUE, Gnb->StdHeader); - -} - -/** - * Init NB Dce Display clock gating - * - * - * - * @param[in] NbClkGatingCtrl Pointer to Clock gating control structure - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitDceDisplayClockGating ( - IN NB_CLK_GATING_CTRL *NbClkGatingCtrl, - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - BOOLEAN Dce_Dispclk_Gating; - FCRxFF30_0134_STRUCT FCRxFF30_0134; - FCRxFF30_1B7C_STRUCT FCRxFF30_1B7C; - FCRxFF30_1E7C_STRUCT FCRxFF30_1E7C; - FCRxFF30_01F5_STRUCT FCRxFF30_01F5; - - Dce_Dispclk_Gating = NbClkGatingCtrl->Dce_Dispclk_Gating; - -//GMMx4D0[DispclkRDccgGateDisable,DispclkDccgGateDisable] - NbSmuSrbmRegisterRead (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, Gnb->StdHeader); - FCRxFF30_0134.Field.DispclkDccgGateDisable = Dce_Dispclk_Gating ? 0 : 1; - FCRxFF30_0134.Field.DispclkRDccgGateDisable = Dce_Dispclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_0134_ADDRESS, &FCRxFF30_0134.Value, TRUE, Gnb->StdHeader); - -//GMMx[79,6D]F0[CrtcDispclkGSclGateDisable, CrtcDispclkGDcpGateDisable, CrtcDispclkRDcfeGateDisable] - NbSmuSrbmRegisterRead (FCRxFF30_1B7C_ADDRESS, &FCRxFF30_1B7C.Value, Gnb->StdHeader); - FCRxFF30_1B7C.Field.CrtcDispclkRDcfeGateDisable = Dce_Dispclk_Gating ? 0 : 1; - FCRxFF30_1B7C.Field.CrtcDispclkGDcpGateDisable = Dce_Dispclk_Gating ? 0 : 1; - FCRxFF30_1B7C.Field.CrtcDispclkGSclGateDisable = Dce_Dispclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_1B7C_ADDRESS, &FCRxFF30_1B7C.Value, TRUE, Gnb->StdHeader); - - NbSmuSrbmRegisterRead (FCRxFF30_1E7C_ADDRESS, &FCRxFF30_1E7C.Value, Gnb->StdHeader); - FCRxFF30_1E7C.Field.CrtcDispclkRDcfeGateDisable = Dce_Dispclk_Gating ? 0 : 1; - FCRxFF30_1E7C.Field.CrtcDispclkGDcpGateDisable = Dce_Dispclk_Gating ? 0 : 1; - FCRxFF30_1E7C.Field.CrtcDispclkGSclGateDisable = Dce_Dispclk_Gating ? 0 : 1; - NbSmuSrbmRegisterWrite (FCRxFF30_1E7C_ADDRESS, &FCRxFF30_1E7C.Value, TRUE, Gnb->StdHeader); - -//FCRxFF30_01F5[CgDcCgttDispclkOverride] - NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader); - FCRxFF30_01F5.Field.CgDcCgttDispclkOverride = 0; - NbSmuSrbmRegisterWrite (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, TRUE, Gnb->StdHeader); - -} - -/*----------------------------------------------------------------------------------------*/ -/** - * Init NB clock gating - * - * - * - * @param[in] Gnb Pointer to global Gnb configuration - */ - -VOID -NbInitClockGating ( - IN GNB_PLATFORM_CONFIG *Gnb - ) -{ - NB_CLK_GATING_CTRL NbClkGatingCtrl; - - //Init the default value of control structure. - NbClkGatingCtrl.Smu_Sclk_Gating = GnbBuildOptions.SmuSclkClockGatingEnable; - NbClkGatingCtrl.Smu_Lclk_Gating = TRUE; - NbClkGatingCtrl.Orb_Sclk_Gating = TRUE; - NbClkGatingCtrl.Orb_Lclk_Gating = TRUE; - NbClkGatingCtrl.Ioc_Sclk_Gating = TRUE; - NbClkGatingCtrl.Ioc_Lclk_Gating = TRUE; - NbClkGatingCtrl.Bif_Sclk_Gating = TRUE; - NbClkGatingCtrl.Gmc_Sclk_Gating = TRUE; - NbClkGatingCtrl.Dce_Sclk_Gating = TRUE; - NbClkGatingCtrl.Dce_Dispclk_Gating = TRUE; - - NbFmNbClockGating (&NbClkGatingCtrl, Gnb->StdHeader); - - IDS_OPTION_HOOK (IDS_GNB_CLOCK_GATING, &NbClkGatingCtrl, Gnb->StdHeader); - - - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitClockGating Enter\n"); - -//SMU SCLK/LCLK clock gating - NbInitSmuClockGating (&NbClkGatingCtrl, Gnb); - -// ORB clock gating - NbInitOrbClockGating (&NbClkGatingCtrl, Gnb); - -//IOC clock gating - NbInitIocClockGating (&NbClkGatingCtrl, Gnb); - -//BIF Clock Gating - NbInitBifClockGating (&NbClkGatingCtrl, Gnb); - -//GMC Clock Gating - NbInitGmcClockGating (&NbClkGatingCtrl, Gnb); - -//DCE Sclk clock gating - NbInitDceSclkClockGating (&NbClkGatingCtrl, Gnb); - -//DCE Display clock gating - NbInitDceDisplayClockGating (&NbClkGatingCtrl, Gnb); - - GNB_DEBUG_CODE ( - { - FCRxFF30_01F4_STRUCT FCRxFF30_01F4; - FCRxFF30_01F5_STRUCT FCRxFF30_01F5; - FCRxFF30_1512_STRUCT FCRxFF30_1512; - NbSmuSrbmRegisterRead (FCRxFF30_01F4_ADDRESS, &FCRxFF30_01F4.Value, Gnb->StdHeader); - NbSmuSrbmRegisterRead (FCRxFF30_01F5_ADDRESS, &FCRxFF30_01F5.Value, Gnb->StdHeader); - NbSmuSrbmRegisterRead (FCRxFF30_1512_ADDRESS, &FCRxFF30_1512.Value, Gnb->StdHeader); - IDS_HDT_CONSOLE (NB_MISC, " Clock Gating FCRxFF30_01F4 - 0x%x\n", FCRxFF30_01F4.Value); - IDS_HDT_CONSOLE (NB_MISC, " Clock Gating FCRxFF30_01F5 - 0x%x\n", FCRxFF30_01F5.Value); - IDS_HDT_CONSOLE (NB_MISC, " Clock Gating FCRxFF30_1512 - 0x%x\n", FCRxFF30_1512.Value); - } - ); - IDS_HDT_CONSOLE (GNB_TRACE, "NbInitClockGating End\n"); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h deleted file mode 100644 index 1800a0e606..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h +++ /dev/null @@ -1,69 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * NB power management features - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -#ifndef _NBPOWERMGMT_H_ -#define _NBPOWERMGMT_H_ - - -AGESA_STATUS -NbInitPowerManagement ( - IN GNB_PLATFORM_CONFIG *Gnb - ); - -///Control structure for clock gating feature -typedef struct { - BOOLEAN Smu_Sclk_Gating; ///<Control Smu SClk gating 1 Enable 0 Disable - BOOLEAN Smu_Lclk_Gating; ///<Control Smu LClk gating 1 Enable 0 Disable - BOOLEAN Orb_Sclk_Gating; ///<Control ORB SClk gating 1 Enable 0 Disable - BOOLEAN Orb_Lclk_Gating; ///<Control ORB LClk gating 1 Enable 0 Disable - BOOLEAN Ioc_Sclk_Gating; ///<Control IOC SClk gating 1 Enable 0 Disable - BOOLEAN Ioc_Lclk_Gating; ///<Control IOC LClk gating 1 Enable 0 Disable - BOOLEAN Bif_Sclk_Gating; ///<Control BIF SClk gating 1 Enable 0 Disable - BOOLEAN Gmc_Sclk_Gating; ///<Control GMC SClk gating 1 Enable 0 Disable - BOOLEAN Dce_Sclk_Gating; ///<Control DCE SClk gating 1 Enable 0 Disable - BOOLEAN Dce_Dispclk_Gating; ///<Control DCE dispaly gating 1 Enable 0 Disable -} NB_CLK_GATING_CTRL; - -#endif diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c deleted file mode 100644 index 3bf8de5d71..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c +++ /dev/null @@ -1,671 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * SMU access routine - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 48452 $ @e \$Date: 2011-03-09 12:50:44 +0800 (Wed, 09 Mar 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "AGESA.h" -#include "amdlib.h" -#include "Ids.h" -#include "Gnb.h" -#include "GnbCommonLib.h" -#include "NbSmuLib.h" -#include "GnbRegistersLN.h" -#include "S3SaveState.h" -#include "Filecode.h" -#define FILECODE PROC_GNB_NB_NBSMULIB_FILECODE -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ - -/// Efuse write packet -typedef struct { - SMUx0B_x8600_STRUCT SMUx0B_x8600; ///< Reg SMUx0B_x8600 - SMUx0B_x8604_STRUCT SMUx0B_x8604; ///< Reg SMUx0B_x8604 - SMUx0B_x8608_STRUCT SMUx0B_x8608; ///< Reg SMUx0B_x8605 -} MBUS; - - -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- - */ - -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- - */ -VOID -NbSmuIndirectWriteEx ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuIndirectWriteS3Script ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN UINT16 ContextLength, - IN VOID* Context - ); - -UINT32 -NbSmuReadEfuseField ( - IN UINT8 Chain, - IN UINT16 Offset, - IN UINT8 Length, - IN AMD_CONFIG_PARAMS *StdHeader - ); - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU indirect register read - * - * - * - * @param[in] Address Register Address - * @param[in] Width Data width for read - * @param[out] Value Pointer read value - * @param[in] StdHeader Pointer to standard configuration - */ - - -VOID -NbSmuIndirectRead ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - OUT VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - - D0F0x64_x4D_STRUCT D0F0x64_x4D; - UINT32 Data; - GnbLibPciIndirectRead ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4D_ADDRESS | IOC_WRITE_ENABLE, - AccessWidth32, - &D0F0x64_x4D.Value, - StdHeader - ); - - D0F0x64_x4D.Field.ReqType = 0; - D0F0x64_x4D.Field.SmuAddr = Address; - if (Width == AccessS3SaveWidth32 || Width == AccessWidth32) { - D0F0x64_x4D.Field.SmuAddr += 1; - } - - D0F0x64_x4D.Field.ReqToggle = !D0F0x64_x4D.Field.ReqToggle; - - GnbLibPciIndirectWrite ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4D_ADDRESS | IOC_WRITE_ENABLE, - (Width >= AccessS3SaveWidth8) ? AccessS3SaveWidth32 : AccessWidth32, - &D0F0x64_x4D.Value, - StdHeader - ); - - GnbLibPciIndirectRead ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4E_ADDRESS | IOC_WRITE_ENABLE, - (Width >= AccessS3SaveWidth8) ? AccessS3SaveWidth32 : AccessWidth32, - &Data, - StdHeader - ); - - switch (Width) { - case AccessWidth16: - //no break; intended to fall through - case AccessS3SaveWidth16: - *(UINT16 *) Value = (UINT16) Data; - break; - case AccessWidth32: - //no break; intended to fall through - case AccessS3SaveWidth32: - *(UINT32 *) Value = Data; - break; - default: - ASSERT (FALSE); - } -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU indirect register read - * - * - * - * @param[in] Address Register Address - * @param[in] Width Access width - * @param[in] Mask Data mask for compare - * @param[in] CompateData Compare data - * @param[in] StdHeader Pointer to standard configuration - */ - - -VOID -NbSmuIndirectPoll ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN UINT32 Mask, - IN UINT32 CompateData, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 Value; - - do { - NbSmuIndirectRead ( - Address, - Width, - &Value, - StdHeader - ); - } while ((Value & Mask) != CompateData); -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU indirect register write - * - * - * - * @param[in] Address Register Address - * @param[in] Width Data width for write - * @param[in] Value Pointer to write value - * @param[in] StdHeader Pointer to standard configuration - */ - - -VOID -NbSmuIndirectWriteEx ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - D0F0x64_x4D_STRUCT D0F0x64_x4D; - ASSERT (Width != AccessWidth8); - ASSERT (Width != AccessS3SaveWidth8); - - GnbLibPciIndirectRead ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4D_ADDRESS | IOC_WRITE_ENABLE, - AccessWidth32, - &D0F0x64_x4D.Value, - StdHeader - ); - - D0F0x64_x4D.Field.ReqType = 0x1; - D0F0x64_x4D.Field.SmuAddr = Address; - D0F0x64_x4D.Field.ReqToggle = (!D0F0x64_x4D.Field.ReqToggle); - - D0F0x64_x4D.Field.WriteData = ((UINT16 *) Value) [0]; - - GnbLibPciIndirectWrite ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4D_ADDRESS | IOC_WRITE_ENABLE, - (Width >= AccessS3SaveWidth8) ? AccessS3SaveWidth32 : AccessWidth32, - &D0F0x64_x4D.Value, - StdHeader - ); - if (LibAmdAccessWidth (Width) <= 2) { - return; - } - D0F0x64_x4D.Field.ReqType = 0x1; - D0F0x64_x4D.Field.SmuAddr = Address + 1; - D0F0x64_x4D.Field.ReqToggle = (!D0F0x64_x4D.Field.ReqToggle); - D0F0x64_x4D.Field.WriteData = ((UINT16 *) Value)[1]; - - GnbLibPciIndirectWrite ( - MAKE_SBDFO (0, 0, 0, 0, D0F0x60_ADDRESS), - D0F0x64_x4D_ADDRESS | IOC_WRITE_ENABLE, - (Width >= AccessS3SaveWidth8) ? AccessS3SaveWidth32 : AccessWidth32, - &D0F0x64_x4D.Value, - StdHeader - ); -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU indirect register write - * - * - * - * @param[in] Address Register Address - * @param[in] Width Data width for write - * @param[in] Value Pointer to write value - * @param[in] StdHeader Pointer to standard configuration - */ - - -VOID -NbSmuIndirectWrite ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - if (Width >= AccessS3SaveWidth8) { - SMU_INDIRECT_WRITE_DATA Data; - Data.Address = Address; - Data.Width = Width; - Data.Value = *((UINT32*) Value); - S3_SAVE_DISPATCH (StdHeader, NbSmuIndirectWriteS3Script_ID, sizeof (SMU_INDIRECT_WRITE_DATA), &Data); - Width = Width - (AccessS3SaveWidth8 - AccessWidth8); - } - NbSmuIndirectWriteEx (Address, Width, Value, StdHeader); -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Service request for S3 script - * - * - * @param[in] StdHeader Standard configuration header - * @param[in] ContextLength Not used - * @param[in] Context Pointer to service request ID - */ - -VOID -NbSmuIndirectWriteS3Script ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN UINT16 ContextLength, - IN VOID* Context - ) -{ - SMU_INDIRECT_WRITE_DATA *Data; - Data = (SMU_INDIRECT_WRITE_DATA*) Context; - NbSmuIndirectWriteEx (Data->Address, Data->Width, &Data->Value, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU RAM mapped register write - * - * - * - * @param[in] Address Register Address - * @param[in] Value Data pointer for write - * @param[in] Count Number of registers to write - * @param[in] S3Save Save for S3 (True/False) - * @param[in] StdHeader Standard configuration header - */ - -VOID -NbSmuRcuRegisterWrite ( - IN UINT16 Address, - IN UINT32 *Value, - IN UINT32 Count, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 CurrentAddress; - CurrentAddress = Address; - NbSmuIndirectWrite ( - SMUx0B_ADDRESS, - S3Save ? AccessS3SaveWidth16 : AccessWidth16, - &Address, - StdHeader - ); - while (Count-- > 0) { - IDS_HDT_CONSOLE (NB_SMUREG_TRACE, " *WR SMUx0B:0x%x = 0x%x\n", CurrentAddress, *Value); - NbSmuIndirectWrite ( - SMUx05_ADDRESS, - S3Save ? AccessS3SaveWidth32 : AccessWidth32, - Value++, - StdHeader - ); - CurrentAddress += 4; - } -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU RAM mapped register read - * - * - * - * @param[in] Address Register Address - * @param[out] Value Pointer read value - * @param[in] Count Number of registers to read - * @param[in] StdHeader Pointer to standard configuration - */ - -VOID -NbSmuRcuRegisterRead ( - IN UINT16 Address, - OUT UINT32 *Value, - IN UINT32 Count, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - NbSmuIndirectWrite (SMUx0B_ADDRESS, AccessWidth16, &Address, StdHeader); - while (Count-- > 0) { - NbSmuIndirectRead (SMUx05_ADDRESS, AccessWidth32, Value++, StdHeader); - } -} - - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Service request Ext - * - * - * @param[in] RequestId request ID - * @param[in] Flags Flags - * @param[in] StdHeader Standard configuration header - */ - -VOID -NbSmuServiceRequestEx ( - IN UINT8 RequestId, - IN UINT8 Flags, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - SMUx03_STRUCT SMUx03; - SMUx03.Value = 0; - SMUx03.Field.IntReq = 1; - SMUx03.Field.ServiceIndex = RequestId; - NbSmuIndirectWrite (SMUx03_ADDRESS, AccessWidth32, &SMUx03.Value, StdHeader); - if ((Flags & SMU_EXT_SERVICE_FLAGS_POLL_ACK) != 0) { - NbSmuIndirectPoll (SMUx03_ADDRESS, AccessWidth32, BIT1, BIT1, StdHeader); // Wait till IntAck - } - if ((Flags & SMU_EXT_SERVICE_FLAGS_POLL_DONE) != 0) { - NbSmuIndirectPoll (SMUx03_ADDRESS, AccessWidth32, BIT2, BIT2, StdHeader); // Wait till IntDone - } - SMUx03.Value = 0; // Clear IRQ register - NbSmuIndirectWrite (SMUx03_ADDRESS, AccessWidth32, &SMUx03.Value, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Service request - * - * - * @param[in] RequestId request ID - * @param[in] S3Save Save for S3 (True/False) - * @param[in] StdHeader Standard configuration header - */ - -VOID -NbSmuServiceRequest ( - IN UINT8 RequestId, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuServiceRequest Enter [0x%02x]\n", RequestId); - if (S3Save) { - S3_SAVE_DISPATCH (StdHeader, NbSmuServiceRequestS3Script_ID, sizeof (RequestId), &RequestId); - } - NbSmuServiceRequestEx ( - RequestId, - SMU_EXT_SERVICE_FLAGS_POLL_ACK | SMU_EXT_SERVICE_FLAGS_POLL_DONE, - StdHeader - ); - IDS_HDT_CONSOLE (GNB_TRACE, "NbSmuServiceRequest Exit\n"); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Service request for S3 script - * - * - * @param[in] StdHeader Standard configuration header - * @param[in] ContextLength Not used - * @param[in] Context Pointer to service request ID - */ - -VOID -NbSmuServiceRequestS3Script ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN UINT16 ContextLength, - IN VOID* Context - ) -{ - NbSmuServiceRequest (*((UINT8*) Context), FALSE, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Read FCR register - * - * - * @param[in] Address FCR Address - * @param[in] StdHeader Standard configuration header - */ - -UINT32 -NbSmuReadEfuse ( - IN UINT32 Address, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 Value; - - NbSmuSrbmRegisterRead (Address, &Value, StdHeader); - Value = (Value >> 24) | (Value << 24) | ((Value >> 8) & 0xFF00) | ((Value << 8) & 0xFF0000); - return Value; -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU Read arbitrary fuse field - * - * - * @param[in] Chain Address - * @param[in] Offset Offcet - * @param[in] Length Length - * @param[in] StdHeader Standard configuration header - */ - -UINT32 -NbSmuReadEfuseField ( - IN UINT8 Chain, - IN UINT16 Offset, - IN UINT8 Length, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT32 Value; - UINT32 Result; - UINT32 Address; - UINT16 Shift; - ASSERT (Length <= 32); - Shift = (Offset - (Offset & ~0x7)); - Address = 0xFE000000 | (Chain << 12) | (Offset >> 3); - Value = NbSmuReadEfuse (Address, StdHeader); - Result = Value >> Shift; - if ((Shift + Length) > 32) { - Value = NbSmuReadEfuse (Address + 1, StdHeader); - Result |= (Value << (32 - Shift)); - } - Result &= ((1 << Length) - 1); - return Value; -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU SRBM (GMM) register read - * - * - * - * @param[in] Address Register Address - * @param[out] Value Pointer read value - * @param[in] StdHeader Pointer to standard configuration - */ - -VOID -NbSmuSrbmRegisterRead ( - IN UINT32 Address, - OUT UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - MBUS Mbus; - Mbus.SMUx0B_x8600.Value = (0x8650 << SMUx0B_x8600_MemAddr_7_0__OFFSET) | - (1 << SMUx0B_x8600_TransactionCount_OFFSET); - Mbus.SMUx0B_x8604.Value = (4 << SMUx0B_x8604_Txn1TransferLength_7_0__OFFSET); - Mbus.SMUx0B_x8608.Value = (UINT32) (3 << SMUx0B_x8608_Txn1Tsize_OFFSET); - Mbus.SMUx0B_x8600.Field.Txn1MBusAddr_7_0_ = Address & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_15_8_ = (Address >> 8) & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_23_16_ = (Address >> 16) & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_31_24_ = (Address >> 24) & 0xff; - NbSmuRcuRegisterWrite (SMUx0B_x8600_ADDRESS, (UINT32*) &Mbus, 3, FALSE, StdHeader); - NbSmuServiceRequest (0x0B, FALSE, StdHeader); - NbSmuRcuRegisterRead (SMUx0B_x8650_ADDRESS, Value, 1, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU SRBM (GMM) register write - * - * - * - * @param[in] Address Register Address - * @param[in] Value Data pointer for write - * @param[in] S3Save Save for S3 (True/False) - * @param[in] StdHeader Standard configuration header - */ - -VOID -NbSmuSrbmRegisterWrite ( - IN UINT32 Address, - IN UINT32 *Value, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - MBUS Mbus; - IDS_HDT_CONSOLE (NB_SMUREG_TRACE, " *WR SRBM (GMM):0x%x = 0x%x\n", Address, *Value); - Mbus.SMUx0B_x8600.Value = (0x8650 << SMUx0B_x8600_MemAddr_7_0__OFFSET) | - (1 << SMUx0B_x8600_TransactionCount_OFFSET); - Mbus.SMUx0B_x8604.Value = (4 << SMUx0B_x8604_Txn1TransferLength_7_0__OFFSET); - Mbus.SMUx0B_x8608.Value = (UINT32) (3 << SMUx0B_x8608_Txn1Tsize_OFFSET); - Mbus.SMUx0B_x8608.Field.Txn1Mode = 0x1; - Mbus.SMUx0B_x8600.Field.Txn1MBusAddr_7_0_ = Address & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_15_8_ = (Address >> 8) & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_23_16_ = (Address >> 16) & 0xff; - Mbus.SMUx0B_x8604.Field.Txn1MBusAddr_31_24_ = (Address >> 24) & 0xff; - NbSmuRcuRegisterWrite (SMUx0B_x8600_ADDRESS, (UINT32*) &Mbus, 3, S3Save, StdHeader); - NbSmuRcuRegisterWrite (SMUx0B_x8650_ADDRESS, Value, 1, S3Save, StdHeader); - NbSmuServiceRequest (0x0B, S3Save, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU firmware download - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @param[in] Firmware Pointer to SMU firmware header - * @retval AGESA_STATUS - */ - -VOID -NbSmuFirmwareDownload ( - IN SMU_FIRMWARE_HEADER *Firmware, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINTN Index; - SMUx01_STRUCT SMUx01; - NbSmuServiceRequestEx (0x10, SMU_EXT_SERVICE_FLAGS_POLL_ACK , StdHeader); - SMUx01.Value = (1 << SMUx01_RamSwitch_OFFSET) | (1 << SMUx01_VectorOverride_OFFSET); - NbSmuIndirectWrite (SMUx01_ADDRESS, AccessWidth32, &SMUx01.Value, StdHeader); - for (Index = 0; Index < Firmware->NumberOfBlock; Index++) { - NbSmuRcuRegisterWrite ( - (Firmware->BlockArray)[Index].Address, - (Firmware->BlockArray)[Index].Data, - (Firmware->BlockArray)[Index].Length, - FALSE, - StdHeader - ); - } - SMUx01.Value = (1 << SMUx01_Reset_OFFSET) | (1 << SMUx01_VectorOverride_OFFSET); - NbSmuIndirectWrite (SMUx01_ADDRESS, AccessWidth32, &SMUx01.Value, StdHeader); -} - -/*----------------------------------------------------------------------------------------*/ -/** - * SMU firmware revision - * - * - * - * @param[in] StdHeader Pointer to Standard configuration - * @retval Firmware revision info - */ - -SMU_FIRMWARE_REV -NbSmuFirmwareRevision ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - SMU_FIRMWARE_REV Revision; - UINT32 FmRev; - NbSmuRcuRegisterRead ( - 0x830C, - &FmRev, - 1, - StdHeader - ); - Revision.MajorRev = ((UINT16*)&FmRev) [1]; - Revision.MinorRev = ((UINT16*)&FmRev) [0]; - return Revision; -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h deleted file mode 100644 index 6a1435f496..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h +++ /dev/null @@ -1,184 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Various NB initialization services - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: GNB - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -* -*/ -#ifndef _NBSMULIB_H_ -#define _NBSMULIB_H_ - - -#define SMU_EXT_SERVICE_FLAGS_POLL_ACK 0x1 -#define SMU_EXT_SERVICE_FLAGS_POLL_DONE 0x2 -#define SMU_GMM_TO_FCR(GmmReg) ((GmmReg >> 2) | 0xFF300000) - -#pragma pack (push, 1) -/// SMU Register Entry -typedef struct { - UINT16 Reg; ///< Register address - UINT32 Value; ///< Register data -} SMU_REGISTER_ENTRY; - -/// SMU Firmware revision -typedef struct { - UINT16 MajorRev; ///< Major revision - UINT16 MinorRev; ///< Minor revision -} SMU_FIRMWARE_REV; - -/// Firmware block -typedef struct { - UINT16 Address; ///< Block Address - UINT16 Length; ///< Block length in DWORD - UINT32 *Data; ///< Pointer to data array -} SMU_FIRMWARE_BLOCK; - -/// Firmware header -typedef struct { - SMU_FIRMWARE_REV Revision; ///< Revision info - UINT16 NumberOfBlock; ///< Number of blocks - SMU_FIRMWARE_BLOCK *BlockArray; ///< Pointer to block definition array -} SMU_FIRMWARE_HEADER; - -/// SMU indirect register write data context -typedef struct { - UINT8 Address; ///< SMU indirect register address - ACCESS_WIDTH Width; ///< SMU indirect register width - UINT32 Value; ///< Value -} SMU_INDIRECT_WRITE_DATA; -#pragma pack (pop) - -VOID -NbSmuIndirectRead ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - OUT VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuIndirectPoll ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN UINT32 Mask, - IN UINT32 CompateData, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuIndirectWrite ( - IN UINT8 Address, - IN ACCESS_WIDTH Width, - IN VOID *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuRcuRegisterWrite ( - IN UINT16 Address, - IN UINT32 *Value, - IN UINT32 Count, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuRcuRegisterRead ( - IN UINT16 Address, - OUT UINT32 *Value, - IN UINT32 Count, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuSrbmRegisterRead ( - IN UINT32 Address, - OUT UINT32 *Value, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuSrbmRegisterWrite ( - IN UINT32 Address, - IN UINT32 *Value, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuServiceRequestEx ( - IN UINT8 RequestId, - IN UINT8 Flags, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuServiceRequest ( - IN UINT8 RequestId, - IN BOOLEAN S3Save, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuServiceRequestS3Script ( - IN AMD_CONFIG_PARAMS *StdHeader, - IN UINT16 ContextLength, - IN VOID* Context - ); - -UINT32 -NbSmuReadEfuse ( - IN UINT32 Address, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -VOID -NbSmuFirmwareDownload ( - IN SMU_FIRMWARE_HEADER *Firmware, - IN AMD_CONFIG_PARAMS *StdHeader - ); - -SMU_FIRMWARE_REV -NbSmuFirmwareRevision ( - IN AMD_CONFIG_PARAMS *StdHeader - ); - -#define SMI_FIRMWARE_REVISION(x) ((x.MajorRev << 16) | x.MinorRev) -#endif |