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-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c110
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c59
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c60
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c131
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c61
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c113
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c61
-rw-r--r--src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c113
8 files changed, 0 insertions, 708 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c
deleted file mode 100644
index d2738975e4..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch LPC controller
- *
- * Init LPC Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_LPCENV_FILECODE
-/**
- * FchInitEnvLpcPciTable - PCI device registers initial during
- * early POST.
- *
- */
-REG8_MASK FchInitEnvLpcPciTable[] =
-{
- //
- // LPC Device (Bus 0, Dev 20, Func 3)
- //
- {0x00, LPC_BUS_DEV_FUN, 0},
- {FCH_LPC_REG40, ~BIT2, BIT2}, /// Enabling LPC DMA Function 0x40[2]=1b 0x78[0]=0b
- {FCH_LPC_REG48, 0x00, BIT0 + BIT1 + BIT2},
- {FCH_LPC_REG78, 0xFC, 00}, /// Enabling LPC DMA Function 0x40[2]=1b 0x78[0]=0b / Disables MSI capability
- {FCH_LPC_REGBB, ~BIT0, BIT0 + BIT3 + BIT4 + BIT5}, /// Enabled SPI Prefetch from HOST.
- {0xFF, 0xFF, 0xFF},
-};
-
-/**
- * FchInitEnvLpc - Config LPC controller before PCI emulation
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitEnvLpc (
- IN VOID *FchDataPtr
- )
-{
- FCH_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
-
- //
- // LPC CFG programming
- //
- //
- // Turn on and configure LPC clock (48MHz)
- //
- RwMem (ACPI_MMIO_BASE + MISC_BASE + 0x28, AccessWidth32, ~(BIT21 + BIT20 + BIT19), 2 << 19);
- RwMem (ACPI_MMIO_BASE + MISC_BASE + FCH_MISC_REG40, AccessWidth8, ~BIT7, 0);
-
- //
- // Initialization of pci config space
- //
- ProgramPciByteTable ((REG8_MASK*) (&FchInitEnvLpcPciTable[0]), sizeof (FchInitEnvLpcPciTable) / sizeof (REG8_MASK), StdHeader);
-
- //
- // SSID for LPC Controller
- //
- if (LocalCfgPtr->Spi.LpcSsid != NULL ) {
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG2C, AccessWidth32, 0x00, LocalCfgPtr->Spi.LpcSsid, StdHeader);
- }
- //
- // LPC MSI
- //
- if ( LocalCfgPtr->Spi.LpcMsiEnable ) {
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG78, AccessWidth32, ~BIT1, BIT1, StdHeader);
- }
-}
-
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c
deleted file mode 100644
index 2246c950d4..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch LPC controller
- *
- * Init LPC Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_LPCLATE_FILECODE
-
-/**
- * FchInitLateLpc - Prepare Ir controller to boot to OS.
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitLateLpc (
- IN VOID *FchDataPtr
- )
-{
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGBB, AccessWidth8, 0xBF, BIT3 + BIT4 + BIT5, ((FCH_DATA_BLOCK *)FchDataPtr)->StdHeader);
-}
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c
deleted file mode 100644
index 92e77bc202..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch LPC controller
- *
- * Init LPC Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_LPCMID_FILECODE
-
-/**
- * FchInitMidLpc - Config Lpc controller after PCI emulation
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitMidLpc (
- IN VOID *FchDataPtr
- )
-{
-}
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c
deleted file mode 100644
index 45e842ac49..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch LPC controller
- *
- * Init LPC Controller features (PEI phase).
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_LPCRESET_FILECODE
-/**
- * FchInitResetLpcPciTable - Lpc (Spi) device registers initial
- * during the power on stage.
- *
- *
- *
- *
- */
-REG8_MASK FchInitResetLpcPciTable[] =
-{
- //
- // LPC Device (Bus 0, Dev 20, Func 3)
- //
- {0x00, LPC_BUS_DEV_FUN, 0},
-
- {FCH_LPC_REG48, 0x00, BIT0 + BIT1 + BIT2},
- {FCH_LPC_REG7C, 0x00, BIT0 + BIT2},
- {FCH_LPC_REG78, 0xF0, BIT2 + BIT3}, /// Enable LDRQ pin
- {FCH_LPC_REGBB, 0xFF, BIT3 + BIT4 + BIT5},
- //
- // Set 0xBB [5:3] = 111 to improve SPI timing margin.
- // Set 0xBA [6:5] = 11 improve SPI timing margin. (SPI Prefetch enhancement)
- //
- {FCH_LPC_REGBB, 0xBE, BIT0 + BIT3 + BIT4 + BIT5},
- {FCH_LPC_REGBA, 0x9F, BIT5 + BIT6},
- // Force EC_PortActive to 1 to fix possible IR non function issue when NO_EC_SUPPORT is defined
- {FCH_LPC_REGA4, ~ BIT0, BIT0},
- {0xFF, 0xFF, 0xFF},
-};
-
-
-/**
- * FchInitResetLpc - Config Lpc controller during Power-On
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitResetLpc (
- IN VOID *FchDataPtr
- )
-{
- FCH_RESET_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
-
- //
- // enable prefetch on Host, set LPC cfg 0xBB bit 0 to 1
- //
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGBA, AccessWidth16, 0xFFFF, BIT8, StdHeader);
-
- ProgramPciByteTable ( (REG8_MASK*) (&FchInitResetLpcPciTable[0]), sizeof (FchInitResetLpcPciTable) / sizeof (REG8_MASK), StdHeader);
-
- if ( LocalCfgPtr->LegacyFree ) {
- RwPci (((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG44), AccessWidth32, 00, 0x0003C000, StdHeader);
- } else {
- RwPci (((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG44), AccessWidth32, 00, 0xFF03FFD5, StdHeader);
- }
-
- // Enabling SPI ROM Prefetch
- // Set LPC cfg 0xBA bit 8
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGBA, AccessWidth16, 0xFFFF, BIT8, StdHeader);
-
- // Enable SPI Prefetch for USB, set LPC cfg 0xBA bit 7 to 1.
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGBA, AccessWidth16, 0xFFFF, BIT7, StdHeader);
-}
-
-/**
- * FchInitRecoveryLpc - Config Lpc controller during Crisis
- * Recovery
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitRecoveryLpc (
- IN VOID *FchDataPtr
- )
-{
-}
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c
deleted file mode 100644
index 5be4752390..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch Spi (Lpc) controller
- *
- * Init Spi (Lpc) Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_SPIENV_FILECODE
-
-/**
- * FchInitEnvSpi - Config Spi controller before PCI emulation
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitEnvSpi (
- IN VOID *FchDataPtr
- )
-{
- FchInitEnvLpc (FchDataPtr);
-}
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c
deleted file mode 100644
index bc6387e242..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch Spi (Lpc) controller
- *
- * Init Spi (Lpc) Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_SPILATE_FILECODE
-
-/**
- * FchInitLateSpi - Prepare Spi controller to boot to OS.
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitLateSpi (
- IN VOID *FchDataPtr
- )
-{
- FchInitLateLpc (FchDataPtr);
-}
-
-/**
- * FchSpiUnlock - Fch SPI Unlock
- *
- *
- * @param[in] FchDataPtr
- *
- */
-VOID
-FchSpiUnlock (
- IN VOID *FchDataPtr
- )
-{
- UINT32 SpiRomBase;
- FCH_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
- SpiRomBase = UserOptions.CfgSpiRomBaseAddress;
-
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG50, AccessWidth32, ~(BIT0 + BIT1), 0, StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG54, AccessWidth32, ~(BIT0 + BIT1), 0, StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG58, AccessWidth32, ~(BIT0 + BIT1), 0, StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG5C, AccessWidth32, ~(BIT0 + BIT1), 0, StdHeader);
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, ~(BIT22 + BIT23), (BIT22 + BIT23));
-}
-
-/**
- * FchSpiLock - Fch SPI lock
- *
- *
- * @param[in] FchDataPtr
- *
- */
-VOID
-FchSpiLock (
- IN VOID *FchDataPtr
- )
-{
- UINT32 SpiRomBase;
- FCH_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
- SpiRomBase = UserOptions.CfgSpiRomBaseAddress;
-
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG50, AccessWidth32, ~(BIT0 + BIT1), (BIT0 + BIT1), StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG54, AccessWidth32, ~(BIT0 + BIT1), (BIT0 + BIT1), StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG58, AccessWidth32, ~(BIT0 + BIT1), (BIT0 + BIT1), StdHeader);
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG5C, AccessWidth32, ~(BIT0 + BIT1), (BIT0 + BIT1), StdHeader);
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, ~(BIT22 + BIT23), 0);
-} \ No newline at end of file
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c
deleted file mode 100644
index 6ba636a983..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch Spi (Lpc) controller
- *
- * Init Spi (Lpc) Controller features.
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_SPIMID_FILECODE
-
-/**
- * FchInitMidSpi - Config Spi controller after PCI emulation
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitMidSpi (
- IN VOID *FchDataPtr
- )
-{
- FchInitMidLpc (FchDataPtr);
-}
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c
deleted file mode 100644
index d288cce5d4..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch Spi controller
- *
- * Init Spi Controller features (PEI phase).
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#define FILECODE PROC_FCH_SPI_SPIRESET_FILECODE
-
-/**
- * FchInitResetSpi - Config Spi controller during Power-On
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitResetSpi (
- IN VOID *FchDataPtr
- )
-{
- UINT32 SpiModeByte;
- UINT32 SpiRomBase;
- FCH_RESET_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
- SpiRomBase = UserOptions.CfgSpiRomBaseAddress;
-
- //
- // Set Spi ROM Base Address
- //
- RwPci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGA0, AccessWidth32, 0x001F, SpiRomBase, StdHeader);
-
- //
- // Spi Mode Initial
- //
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, 0xFFFFFFFF, (BIT19 + BIT24 + BIT25 + BIT26));
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG0C, AccessWidth32, 0xFFC0FFFF, 0 );
-
- if (LocalCfgPtr->SpiSpeed) {
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG0C, AccessWidth32, ~(BIT13 + BIT12), ((LocalCfgPtr->SpiSpeed - 1 ) << 12));
- }
-
- if (LocalCfgPtr->FastSpeed) {
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG0C, AccessWidth32, ~(BIT15 + BIT14), ((LocalCfgPtr->FastSpeed - 1 ) << 14));
- }
-
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG1C, AccessWidth32, ~(BIT10), ((LocalCfgPtr->BurstWrite) << 10));
-
- SpiModeByte = LocalCfgPtr->Mode;
- if (LocalCfgPtr->Mode) {
- if ((SpiModeByte == FCH_SPI_MODE_QUAL_114) || (SpiModeByte == FCH_SPI_MODE_QUAL_112) || (SpiModeByte == FCH_SPI_MODE_QUAL_144) || (SpiModeByte == FCH_SPI_MODE_QUAL_122)) {
- }
- RwMem (SpiRomBase + FCH_SPI_MMIO_REG00, AccessWidth32, ~( BIT18 + BIT29 + BIT30), ((LocalCfgPtr->Mode & 1) << 18) + ((LocalCfgPtr->Mode & 6) << 28));
- }
-}
-
-/**
- * FchInitRecoverySpi - Config Spi controller during Crisis
- * Recovery
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitRecoverySpi (
- IN VOID *FchDataPtr
- )
-{
-}
-