diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/Fch/Sata')
25 files changed, 0 insertions, 3068 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c deleted file mode 100644 index cee7dd3a19..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c +++ /dev/null @@ -1,86 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (AHCI mode) - * - * Init SATA AHCI features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_AHCIENV_FILECODE - -/** - * FchInitEnvSataAhci - Config SATA Ahci controller before PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvSataAhci ( - IN VOID *FchDataPtr - ) -{ - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - // Class code - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01060140, StdHeader); - // - // Device ID - // - if ( LocalCfgPtr->Sata.SataClass == SataAhci7804 ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, FCH_SATA_AMDAHCI_DID, StdHeader); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, FCH_SATA_AHCI_DID, StdHeader); - } - // - // SSID - // - if (LocalCfgPtr->Sata.SataAhciSsid != NULL ) { - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG2C, AccessWidth32, 0x00, LocalCfgPtr->Sata.SataAhciSsid, StdHeader); - } -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c deleted file mode 100644 index 022835baea..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c +++ /dev/null @@ -1,61 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (AHCI mode) - * - * Init SATA AHCI features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_AHCILATE_FILECODE - -/** - * FchInitLateSataAhci - Prepare SATA AHCI controller to boot to - * OS. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateSataAhci ( - IN VOID *FchDataPtr - ) -{ -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c deleted file mode 100644 index be2f3ec702..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c +++ /dev/null @@ -1,68 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA AHCI controller Library - * - * SATA AHCI Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_AHCILIB_FILECODE - -/** - * sataAhciSetDeviceNumMsi - Program AHCI controller support - * device number cap & MSI cap - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataAhciSetDeviceNumMsi ( - IN VOID *FchDataPtr - ) -{ - - FCH_INTERFACE *LocalCfgPtr; - - LocalCfgPtr = (FCH_INTERFACE *)FchDataPtr; - - SataSetDeviceNumMsi (LocalCfgPtr); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c deleted file mode 100644 index 6312a83294..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c +++ /dev/null @@ -1,70 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (AHCI mode) - * - * Init SATA AHCI features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_AHCIMID_FILECODE - -/** - * FchInitMidSataAhci - Config SATA Ahci controller after PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidSataAhci ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - SataAhciSetDeviceNumMsi (LocalCfgPtr); - SataBar5setting (LocalCfgPtr, &Bar5); - ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c deleted file mode 100644 index 627b54deff..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c +++ /dev/null @@ -1,218 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Graphics Controller family specific service procedure - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 49766 $ @e \$Date: 2011-03-29 06:18:48 +0800 (Tue, 29 Mar 2011) $ - * - */ - -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -*/ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATAENVSERVICE_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ -// -// Local Routine -// -VOID FchSataCombineControlDataByte (IN UINT8 *ControlReg); -VOID FchSataCombineControlDataWord (IN UINT16 *ControlReg); - -SATA_PHY_SETTING SataPhyTable[] = -{ - //Gen3 - 0x0030, 0x0057A607, - 0x0031, 0x0057A607, - 0x0032, 0x0057A407, - 0x0033, 0x0057A407, - 0x0034, 0x0057A607, - 0x0035, 0x0057A607, - 0x0036, 0x0057A403, - 0x0037, 0x0057A403, - - //Gen2 - 0x0120, 0x00071302, - - //Gen1 - 0x0110, 0x00174101 -}; - -/** - * FchInitEnvProgramSataPciRegs - Sata Pci Configuration Space - * register setting - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvProgramSataPciRegs ( - IN VOID *FchDataPtr - ) -{ - UINT8 *PortRegByte; - UINT16 *PortRegWord; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - // - // Caculate SataPortReg for SATA_ESP_PORT - // - PortRegByte = &(LocalCfgPtr->Sata.SataEspPort.SataPortReg); - FchSataCombineControlDataByte (PortRegByte); - PortRegByte = &(LocalCfgPtr->Sata.SataPortPower.SataPortReg); - FchSataCombineControlDataByte (PortRegByte); - PortRegWord = &(LocalCfgPtr->Sata.SataPortMd.SataPortMode); - FchSataCombineControlDataWord (PortRegWord); - PortRegByte = &(LocalCfgPtr->Sata.SataHotRemovalEnhPort.SataPortReg); - FchSataCombineControlDataByte (PortRegByte); - - // - // Set Sata PCI Configuration Space Write enable - // - SataEnableWriteAccess (StdHeader); - - // - // Enables the SATA watchdog timer register prior to the SATA BIOS post - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG44), AccessWidth8, 0xff, BIT0, StdHeader); - - // - // SATA PCI Watchdog timer setting - // Set timer out to 0x20 to fix IDE to SATA Bridge dropping drive issue. - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG44 + 2), AccessWidth8, 0, 0x20, StdHeader); - - // - // BIT4:disable fast boot - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40), AccessWidth8, 0xff, BIT4, StdHeader); - - // - // Enable IDE DMA read enhancement - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48 + 3), AccessWidth8, 0xff, BIT7, StdHeader); - - // - // Unused SATA Ports Disabled - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40 + 2), AccessWidth8, 0, LocalCfgPtr->Sata.SataPortPower.SataPortReg, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG4C), AccessWidth32, (UINT32) (~ (0x3f << 26)), (UINT32) (0x3f << 26), StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48), AccessWidth32, (UINT32) (~ (0x01 << 11)), (UINT32) (0x01 << 11), StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG84), AccessWidth32, (UINT32) (~ (0x01 << 31)), (UINT32) (0x00 << 31), StdHeader); -} - -/** - * FchSataCombineControlDataByte - Combine port control options - * to one control byte. - * - * - * @param[in] *ControlReg - Data pointer for control byte. - * - */ -VOID -FchSataCombineControlDataByte ( - IN UINT8 *ControlReg - ) -{ - UINT8 Index; - UINT8 PortControl; - - *ControlReg = 0; - for ( Index = 0; Index < 8; Index++ ) { - PortControl = *( ControlReg + 1 + Index ); - *ControlReg |= PortControl << Index; - } -} -/** - * FchSataCombineControlDataWord - Combine port control options - * to one control Word. - * - * - * @param[in] *ControlReg - Data pointer for control byte. - * - */ -VOID -FchSataCombineControlDataWord ( - IN UINT16 *ControlReg - ) -{ - UINT8 Index; - UINT8 PortControl; - - *ControlReg = 0; - for ( Index = 0; Index < 8; Index++ ) { - PortControl = *( (UINT8 *)ControlReg + 2 + Index ); - *ControlReg |= PortControl << (Index * 2); - } -} - - -VOID -FchProgramSataPhy ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - SATA_PHY_SETTING *PhyTablePtr; - UINT16 Index; - - PhyTablePtr = &SataPhyTable[0]; - - for (Index = 0; Index < (sizeof (SataPhyTable) / sizeof (SATA_PHY_SETTING)); Index++) { - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG80, AccessWidth16, 0x00, PhyTablePtr->PhyCoreControlWord, StdHeader); - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG98, AccessWidth32, 0x00, PhyTablePtr->PhyFineTuneDword, StdHeader); - ++PhyTablePtr; - } - - - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG80, AccessWidth16, 0x00, 0x110, StdHeader); - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG9C, AccessWidth32, (UINT32) (~(0x7 << 4)), (UINT32) (0x2 << 4), StdHeader); - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG80, AccessWidth16, 0x00, 0x10, StdHeader); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c deleted file mode 100644 index ce795b63d8..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c +++ /dev/null @@ -1,131 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch Sata controller - * - * Init Sata Controller features (PEI phase). - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATARESETSERVICE_FILECODE - -/** - * FchInitResetSataProgram - Config Sata controller during - * Power-On - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitResetSataProgram ( - IN VOID *FchDataPtr - ) -{ - UINT8 SataPortNum; - UINT8 PortStatusByte; - UINT8 EfuseByte; - UINT8 FchSataMode; - UINT8 FchSataInternal100Spread; - FCH_RESET_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - //FchSataMode = LocalCfgPtr->Sata.SATA_MODE.SataMode.SataModeReg; - //New structure need calculate Sata Register value - // - FchSataMode = 0; - if ( LocalCfgPtr->FchReset->SataEnable ) FchSataMode |= 0x01; - if ( LocalCfgPtr->Sata6AhciCap ) FchSataMode |= 0x02; - if ( LocalCfgPtr->SataSetMaxGen2 ) FchSataMode |= 0x04; - if ( LocalCfgPtr->FchReset->IdeEnable ) FchSataMode |= 0x08; - - FchSataMode |= (( LocalCfgPtr->SataClkMode ) << 4 ) ; - LocalCfgPtr->SataModeReg = FchSataMode; ///Save Back to Structure - - FchSataInternal100Spread = ( UINT8 ) LocalCfgPtr->SataInternal100Spread; - SataPortNum = 0; - - // - // Sata Workaround - // - for ( SataPortNum = 0; SataPortNum < 0x08; SataPortNum++ ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40 + 2), AccessWidth8, 0xFF, 1 << SataPortNum, StdHeader); - FchStall (2, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40 + 2), AccessWidth8, (0xFF ^ (1 << SataPortNum)) , 0x00, StdHeader); - FchStall (2, StdHeader); - } - - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG84 + 3), AccessWidth8, ~BIT2, 0, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REGA0), AccessWidth8, ~(BIT2 + BIT3 + BIT4 + BIT5 + BIT6), BIT2 + BIT3 + BIT4 + BIT5, StdHeader); - - // - // Sata Setting for clock mode only - // - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth8, 0, FchSataMode); - - if ( FchSataInternal100Spread ) { - RwMem (ACPI_MMIO_BASE + MISC_BASE + 0x1E, AccessWidth8, 0xFF, BIT4); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG84), AccessWidth32, 0xFFFFFFFB, 0x00, StdHeader); - } else { - RwMem (ACPI_MMIO_BASE + MISC_BASE + 0x1E, AccessWidth8, ~BIT4, 0x00); - } - - EfuseByte = SATA_FIS_BASE_EFUSE_LOC; - GetEfuseStatus (&EfuseByte, StdHeader); - - if (EfuseByte & BIT0) { - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth8, 0xFB, 0x04); - } - - ReadMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth8, &PortStatusByte); - if ( ((PortStatusByte & 0xF0) == 0x10) ) { - RwMem (ACPI_MMIO_BASE + MISC_BASE + FCH_PMIOA_REG08, AccessWidth8, 0, BIT5); - } - - if ( FchSataInternal100Spread ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG84), AccessWidth32, 0xFFFFFFFF, 0x04, StdHeader); - } -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c deleted file mode 100644 index ef57858495..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c +++ /dev/null @@ -1,681 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Graphics Controller family specific service procedure - * - * - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 48230 $ @e \$Date: 2011-03-05 06:55:12 +0800 (Sat, 05 Mar 2011) $ - * - */ - -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -* *************************************************************************** -*/ - - -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_FAMILY_HUDSON2_HUDSON2SATASERVICE_FILECODE - -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- - */ -UINT8 NumOfSataPorts = 8; - -/** - * FchSataGpioInitial - Sata GPIO function Procedure - * - * - Private function - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchSataGpioInitial ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - UINT32 FchSataBarRegDword; - UINT32 EMb; - UINT32 SataGpioVariableDword; - UINT8 FchSataSgpio0; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - Bar5 = 0; - EMb = 0; - FchSataSgpio0 = (UINT8) LocalCfgPtr->Sata.SataSgpio0; - - SataBar5setting (LocalCfgPtr, &Bar5); - ReadMem (Bar5 + FCH_SATA_BAR5_REG1C , AccessWidth32, &FchSataBarRegDword); - EMb = (Bar5 + (( FchSataBarRegDword & 0xFFFF0000) >> 14)); - - if ( EMb ) { - SataGpioVariableDword = 0x03040C00; - WriteMem ( Bar5 + EMb, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x00C08240; - WriteMem ( Bar5 + EMb + 4, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x00000001; - WriteMem ( Bar5 + EMb + 8, AccessWidth32, &SataGpioVariableDword); - - if ( FchSataSgpio0 ) { - SataGpioVariableDword = 0x00000060; - } else { - SataGpioVariableDword = 0x00000061; - } - - WriteMem ( Bar5 + EMb + 0x0C, AccessWidth32, &SataGpioVariableDword); - RwMem ((Bar5 + FCH_SATA_BAR5_REG20), AccessWidth16, ~(BIT8), BIT8); - - do { - ReadMem (Bar5 + FCH_SATA_BAR5_REG20 , AccessWidth32, &FchSataBarRegDword); - FchSataBarRegDword = FchSataBarRegDword & BIT8; - } while ( FchSataBarRegDword != 0 ); - - SataGpioVariableDword = 0x03040F00; - WriteMem ( Bar5 + EMb, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x00008240; - WriteMem ( Bar5 + EMb + 4, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x00000002; - WriteMem ( Bar5 + EMb + 8, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x00800000; - WriteMem ( Bar5 + EMb + 0x0C, AccessWidth32, &SataGpioVariableDword); - SataGpioVariableDword = 0x0F003700; - WriteMem ( Bar5 + EMb + 0x0C, AccessWidth32, &SataGpioVariableDword); - RwMem ((Bar5 + FCH_SATA_BAR5_REG20), AccessWidth16, ~(BIT8), BIT8); - - do { - ReadMem (Bar5 + FCH_SATA_BAR5_REG20 , AccessWidth32, &FchSataBarRegDword); - FchSataBarRegDword = FchSataBarRegDword & BIT8; - } while ( FchSataBarRegDword != 0 ); - } -} - -/** - * FchInitMidProgramSataRegs - Sata Pci Configuration Space - * register setting - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidProgramSataRegs ( - IN VOID *FchDataPtr - ) -{ - UINT8 FchSataMsiCapability; - UINT8 FchSataTargetSupport8Device; - UINT8 FchSataDisableGenericMode; - UINT8 FchSataSgpio0; - UINT8 FchSataSgpio1; - UINT8 FchSataPhyPllShutDown; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - FchSataMsiCapability = (UINT8) LocalCfgPtr->Sata.SataMsiCapability; - FchSataTargetSupport8Device = (UINT8) LocalCfgPtr->Sata.SataTargetSupport8Device; - FchSataDisableGenericMode = (UINT8) LocalCfgPtr->Sata.SataDisableGenericMode; - FchSataSgpio0 = (UINT8) LocalCfgPtr->Sata.SataSgpio0; - FchSataSgpio1 = (UINT8) LocalCfgPtr->Sata.SataSgpio1; - FchSataPhyPllShutDown = (UINT8) LocalCfgPtr->Sata.SataPhyPllShutDown; - - // - // Enabled SATA MSI capability - // SATA MSI and D3 Power State Capability - // - if ( FchSataMsiCapability ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG34), AccessWidth8, 0, 0x50, StdHeader); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG34), AccessWidth8, 0, 0x70, StdHeader); - } - - // - // Disable SATA FLR Capability - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG70), AccessWidth16, 0x00FF, 0x00, StdHeader); - - // - // Sata Target Support 8 devices function - // - if ( FchSataTargetSupport8Device ) { - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth16, ~BIT12, BIT12); - } else { - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth16, ~BIT12, 0x00); - } - - // - // Sata Generic Mode setting - // - if ( FchSataDisableGenericMode ) { - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth16, ~BIT13, BIT13); - } else { - RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGDA, AccessWidth16, ~BIT13, 0x00); - } - - // - // Sata GPIO Initial - // - if ( FchSataSgpio0 ) { - FchSataGpioInitial ( LocalCfgPtr ); - } - - if ( FchSataSgpio1 ) { - FchSataGpioInitial ( LocalCfgPtr ); - } - - // - // Sata Phy Pll Shutdown setting - // - if ( FchSataPhyPllShutDown ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + 0x87), AccessWidth8, ~(BIT6), BIT6, StdHeader); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + 0x87), AccessWidth8, ~(BIT6), 0x00, StdHeader); - } - - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG4C), AccessWidth32, (UINT32) (~ (0x3f << 26)), (UINT32) (0x3f << 26), StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48), AccessWidth32, (UINT32) (~ (0x01 << 11)), (UINT32) (0x01 << 11), StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG84), AccessWidth32, (UINT32) (~ (0x01 << 31)), (UINT32) (0x00 << 31), StdHeader); -} - - -/** - * FchInitLateProgramSataRegs - Sata Pci Configuration Space - * register setting - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateProgramSataRegs ( - IN VOID *FchDataPtr - ) -{ - UINT8 PortNumByte; - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - SataBar5setting (LocalCfgPtr, &Bar5); - // - //Clear error status - // - RwMem ((Bar5 + FCH_SATA_BAR5_REG130), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG1B0), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG230), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG2B0), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG330), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG3B0), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG430), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - RwMem ((Bar5 + FCH_SATA_BAR5_REG4B0), AccessWidth32, 0xFFFFFFFF, 0xFFFFFFFF); - - for ( PortNumByte = 0; PortNumByte < MAX_SATA_PORTS; PortNumByte++ ) { - RwMem ((Bar5 + 0x110 + (PortNumByte * 0x80)), AccessWidth32, 0xFFFFFFFF, 0x00); - } -} - -/** - * sataBar5RegSet - Sata Bar5 register setting - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataBar5RegSet ( - IN VOID *FchDataPtr - ) -{ - UINT32 AndMaskDword; - UINT32 OrMaskDword; - UINT32 Bar5; - UINT8 EfuseByte; - UINT8 FchSataAggrLinkPmCap; - UINT8 FchSataPortMultCap; - UINT8 FchSataPscCap; - UINT8 FchSataSscCap; - UINT8 FchSataFisBasedSwitching; - UINT8 FchSataCccSupport; - UINT8 FchSataAhciEnclosureManagement; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - FchSataAggrLinkPmCap = (UINT8) LocalCfgPtr->Sata.SataAggrLinkPmCap; - FchSataPortMultCap = (UINT8) LocalCfgPtr->Sata.SataPortMultCap; - FchSataPscCap = (UINT8) LocalCfgPtr->Sata.SataPscCap; - FchSataSscCap = (UINT8) LocalCfgPtr->Sata.SataSscCap; - FchSataFisBasedSwitching = (UINT8) LocalCfgPtr->Sata.SataFisBasedSwitching; - FchSataCccSupport = (UINT8) LocalCfgPtr->Sata.SataCccSupport; - FchSataAhciEnclosureManagement = (UINT8) LocalCfgPtr->Sata.SataAhciEnclosureManagement; - - AndMaskDword = 0; - OrMaskDword = 0; - Bar5 = 0; - - SataBar5setting (LocalCfgPtr, &Bar5); - EfuseByte = SATA_FIS_BASE_EFUSE_LOC; - GetEfuseStatus (&EfuseByte, LocalCfgPtr->StdHeader); - - if ( !FchSataPortMultCap ) { - AndMaskDword |= BIT12; - } - - if ( FchSataAggrLinkPmCap ) { - OrMaskDword |= BIT11; - } else { - AndMaskDword |= BIT11; - } - - if ( FchSataPscCap ) { - OrMaskDword |= BIT1; - } else { - AndMaskDword |= BIT1; - } - - if ( FchSataSscCap ) { - OrMaskDword |= BIT26; - } else { - AndMaskDword |= BIT26; - } - - if ( FchSataFisBasedSwitching ) { - if (EfuseByte & BIT1) { - AndMaskDword |= BIT10; - } else { - OrMaskDword |= BIT10; - } - } else { - AndMaskDword |= BIT10; - } - - // - // Disabling CCC (Command Completion Coalescing) support. - // - if ( FchSataCccSupport ) { - OrMaskDword |= BIT19; - } else { - AndMaskDword |= BIT19; - } - - if ( FchSataAhciEnclosureManagement ) { - OrMaskDword |= BIT27; - } else { - AndMaskDword |= BIT27; - } - - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth32, ~AndMaskDword, OrMaskDword); - - // - // SATA ESP port setting - // These config bits are set for SATA driver to identify which ports are external SATA ports and need to - // support hotplug. If a port is set as an external SATA port and need to support hotplug, then driver will - // not enable power management (HIPM & DIPM) for these ports. - // - if ( LocalCfgPtr->Sata.SataEspPort.SataPortReg != 0 ) { - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, ~(LocalCfgPtr->Sata.SataEspPort.SataPortReg), 0); - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, 0xFF00FF00, (LocalCfgPtr->Sata.SataEspPort.SataPortReg << 16)); - // - // External SATA Port Indication Registers - // If any of the ports was programmed as an external port, HCAP.SXS should also be set - // - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth32, ~(BIT20), BIT20); - } else { - // - // External SATA Port Indication Registers - // If any of the ports was programmed as an external port, HCAP.SXS should also be set (Clear for no ESP port) - // - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, 0xFF00FF00, 0x00); - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth32, ~(BIT20), 0x00); - } - - if ( FchSataFisBasedSwitching ) { - if (EfuseByte & BIT1) { - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, 0x00FFFFFF, 0x00); - } else { - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, 0x00FFFFFF, 0xFF000000); - } - } else { - RwMem ((Bar5 + FCH_SATA_BAR5_REGF8), AccessWidth32, 0x00FFFFFF, 0x00); - } - - if ( LocalCfgPtr->Sata.BiosOsHandOff == 1 ) { - RwMem ((Bar5 + FCH_SATA_BAR5_REG24), AccessWidth8, ~BIT0, BIT0); - } else { - RwMem ((Bar5 + FCH_SATA_BAR5_REG24), AccessWidth8, ~BIT0, 0x00); - } -} - -/** - * FchSataSetDeviceNumMsi - Program Sata controller support - * device number cap & MSI cap - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchSataSetDeviceNumMsi ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - Bar5 = 0; - SataBar5setting (LocalCfgPtr, &Bar5); - // - // RAID or AHCI - // - if (LocalCfgPtr->Sata.SataMode.IdeEnable == DISABLED) { - // - // IDE2 Controller is enabled - // - if (LocalCfgPtr->Sata.SataMode.Sata6AhciCap == ENABLED) { - // - // 6 AHCI mode - // - RwMem ((Bar5 + FCH_SATA_BAR5_REG0C), AccessWidth8, 0x00, 0x3F); - RwMem ((Bar5 + FCH_SATA_BAR5_REG00), AccessWidth8, ~(BIT2 + BIT1 + BIT0), BIT2 + BIT0); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG50 + 2), AccessWidth8, ~(BIT3 + BIT2 + BIT1), BIT2 + BIT1, StdHeader); - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth8, 0x07, 0x30); - } else { - RwMem ((Bar5 + FCH_SATA_BAR5_REG0C), AccessWidth8, 0x00, 0x0F); - if ( LocalCfgPtr->Sata.SataCccSupport ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG50 + 2), AccessWidth8, ~(BIT3 + BIT2 + BIT1), BIT2 + BIT1, StdHeader); - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth8, 0x07, 0x20); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG50 + 2), AccessWidth8, ~(BIT3 + BIT2 + BIT1), BIT2, StdHeader); - } - } - } else { - // - // IDE2 Controller is disabled - // - RwMem ((Bar5 + FCH_SATA_BAR5_REG00), AccessWidth8, ~(BIT2 + BIT1 + BIT0), BIT2 + BIT1 + BIT0); - RwMem ((Bar5 + FCH_SATA_BAR5_REG0C), AccessWidth8, 0x00, 0xFF); - if ( LocalCfgPtr->Sata.SataCccSupport ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG50 + 2), AccessWidth8, ~(BIT3 + BIT2 + BIT1), BIT3, StdHeader); - RwMem ((Bar5 + FCH_SATA_BAR5_REGFC), AccessWidth8, 0x07, 0x40); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG50 + 2), AccessWidth8, ~(BIT3 + BIT2 + BIT1), BIT2 + BIT1, StdHeader); - } - } -} - - -/** - * FchSataDriveDetection - Sata drive detection - * - * - Sata Ide & Sata Ide to Ahci only - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * @param[in] *Bar5Ptr Sata BAR5 base address. - * - */ -VOID -FchSataDriveDetection ( - IN VOID *FchDataPtr, - IN UINT32 *Bar5Ptr - ) -{ - UINT32 SataBarInfo; - UINT8 PortNumByte; - UINT8 SataPortType; - UINT16 IoBaseWord; - UINT16 SataLoopVarWord; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - for ( PortNumByte = 0; PortNumByte < 4; PortNumByte++ ) { - - ReadMem (*Bar5Ptr + FCH_SATA_BAR5_REG128 + PortNumByte * 0x80, AccessWidth32, &SataBarInfo); - - if ( ( SataBarInfo & 0x0F ) == 0x03 ) { - if ( PortNumByte & BIT0 ) { - // - //this port belongs to secondary channel - // - ReadPci (((UINT32) (SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG18), AccessWidth16, &IoBaseWord, StdHeader); - } else { - // - //this port belongs to primary channel - // - ReadPci (((UINT32) (SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG10), AccessWidth16, &IoBaseWord, StdHeader); - } - - // - //if legacy ide mode, then the bar registers don't contain the correct values. So we need to hardcode them - // - if ( LocalCfgPtr->Sata.SataClass == SataLegacyIde ) { - IoBaseWord = ( (0x170) | ((UINT16) ( (~((UINT8) (PortNumByte & BIT0) << 7)) & 0x80 )) ); - } - - if ( PortNumByte & BIT1 ) { - // - //this port is slave - // - SataPortType = 0xB0; - } else { - // - //this port is master - // - SataPortType = 0xA0; - } - - IoBaseWord &= 0xFFF8; - LibAmdIoWrite (AccessWidth8, IoBaseWord + 6, &SataPortType, StdHeader); - - // - //Wait in loop for 30s for the drive to become ready - // - for ( SataLoopVarWord = 0; SataLoopVarWord < 300000; SataLoopVarWord++ ) { - LibAmdIoRead (AccessWidth8, IoBaseWord + 7, &SataPortType, StdHeader); - if ( (SataPortType & 0x88) == 0 ) { - break; - } - FchStall (100, StdHeader); - } - } - } -} - -/** - * FchShutdownUnconnectedSataPortClock - Shutdown unconnected - * Sata port clock - * - * - Sata Ide & Sata Ide to Ahci only - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * @param[in] Bar5 Sata BAR5 base address. - * - */ -VOID -FchShutdownUnconnectedSataPortClock ( - IN VOID *FchDataPtr, - IN UINT32 Bar5 - ) -{ - UINT8 PortNumByte; - UINT8 PortSataStatusByte; - UINT8 NumOfPorts; - UINT8 FchSataClkAutoOff; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - FchSataClkAutoOff = (UINT8) LocalCfgPtr->Sata.SataClkAutoOff; - - NumOfPorts = 0; - // - // Enable SATA auto clock control by default - // - for ( PortNumByte = 0; PortNumByte < MAX_SATA_PORTS; PortNumByte++ ) { - ReadMem (Bar5 + FCH_SATA_BAR5_REG128 + (PortNumByte * 0x80), AccessWidth8, &PortSataStatusByte); - // - // Shutdown the clock for the port and do the necessary port reporting changes. - // Error port status should be 1 not 3 - // - if ( ((PortSataStatusByte & 0x0F) != 0x03) && (! ((LocalCfgPtr->Sata.SataEspPort.SataPortReg) & (1 << PortNumByte))) ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40 + 2), AccessWidth8, 0xFF, (1 << PortNumByte), StdHeader); - RwMem (Bar5 + FCH_SATA_BAR5_REG0C, AccessWidth8, ~(1 << PortNumByte), 00); - } - } ///end of for (PortNumByte=0;PortNumByte<6;PortNumByte++) - - ReadMem (Bar5 + FCH_SATA_BAR5_REG0C, AccessWidth8, &PortSataStatusByte); - - // - //if all ports are in disabled state, report at least one port - // - if ( (PortSataStatusByte & 0xFF) == 0) { - RwMem (Bar5 + FCH_SATA_BAR5_REG0C, AccessWidth8, (UINT32) ~(0xFF), 01); - } - - ReadMem (Bar5 + FCH_SATA_BAR5_REG0C, AccessWidth8, &PortSataStatusByte); - - for (PortNumByte = 0; PortNumByte < MAX_SATA_PORTS; PortNumByte ++) { - if (PortSataStatusByte & (1 << PortNumByte)) { - NumOfPorts++; - } - } - - if ( NumOfPorts == 0) { - NumOfPorts = 0x01; - } - - RwMem (Bar5 + FCH_SATA_BAR5_REG00, AccessWidth8, 0xE0, NumOfPorts - 1); -} - -/** - * FchSataSetPortGenMode - Set Sata port mode (each) for - * Gen1/Gen2/Gen3 - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchSataSetPortGenMode ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - UINT8 PortNumByte; - UINT8 PortModeByte; - UINT16 SataPortMode; - BOOLEAN FchSataHotRemovalEnh; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - FchSataHotRemovalEnh = LocalCfgPtr->Sata.SataHotRemovalEnh; - - SataBar5setting (LocalCfgPtr, &Bar5); - SataPortMode = (UINT16)LocalCfgPtr->Sata.SataPortMd.SataPortMode; - PortNumByte = 0; - - while ( PortNumByte < 8 ) { - PortModeByte = (UINT8) (SataPortMode & 3); - if ( (PortModeByte == BIT0) || (PortModeByte == BIT1) ) { - if ( PortModeByte == BIT0 ) { - // - // set GEN 1 - // - RwMem (Bar5 + FCH_SATA_BAR5_REG12C + PortNumByte * 0x80, AccessWidth8, 0x0F, 0x10); - } - - if ( PortModeByte == BIT1 ) { - // - // set GEN2 (default is GEN3) - // - RwMem (Bar5 + FCH_SATA_BAR5_REG12C + PortNumByte * 0x80, AccessWidth8, 0x0F, 0x20); - } - - RwMem (Bar5 + FCH_SATA_BAR5_REG12C + PortNumByte * 0x80, AccessWidth8, 0xFF, 0x01); - } - - SataPortMode >>= 2; - PortNumByte ++; - } - - FchStall (1000, StdHeader); - SataPortMode = (UINT16)LocalCfgPtr->Sata.SataPortMd.SataPortMode; - PortNumByte = 0; - - while ( PortNumByte < 8 ) { - PortModeByte = (UINT8) (SataPortMode & 3); - - if ( (PortModeByte == BIT0) || (PortModeByte == BIT1) ) { - RwMem (Bar5 + FCH_SATA_BAR5_REG12C + PortNumByte * 0x80, AccessWidth8, 0xFE, 0x00); - } - - PortNumByte ++; - SataPortMode >>= 2; - } - - // - // Sata Hot Removal Enhance setting - // - if ( FchSataHotRemovalEnh ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG80), AccessWidth16, ~BIT8, BIT8, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REGA8), AccessWidth16, ~BIT0, BIT0, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG80), AccessWidth16, ~BIT8, 0, StdHeader); - } -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c deleted file mode 100644 index 89add10c67..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c +++ /dev/null @@ -1,86 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Ide2Ahci mode) - * - * Init SATA Ide2Ahci features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_IDE2AHCIENV_FILECODE - -/** - * FchInitEnvSataIde2Ahci - Config SATA Ide2Ahci controller - * before PCI emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvSataIde2Ahci ( - IN VOID *FchDataPtr - ) -{ - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - // Class code - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01018F40, StdHeader); - // - // Device ID - // - if ( LocalCfgPtr->Sata.SataClass == SataIde2Ahci7804 ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, FCH_SATA_AMDAHCI_DID, StdHeader); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, FCH_SATA_AHCI_DID, StdHeader); - } - // - // SSID - // - if (LocalCfgPtr->Sata.SataAhciSsid != NULL ) { - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG2C, AccessWidth32, 0x00, LocalCfgPtr->Sata.SataAhciSsid, StdHeader); - } -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c deleted file mode 100644 index 449da54c3b..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c +++ /dev/null @@ -1,82 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Ide2Ahci mode) - * - * Init SATA Ide2Ahci features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_IDE2AHCILATE_FILECODE - -/** - * FchInitLateSataIde2Ahci - Prepare SATA Ide2Ahci controller to - * boot to OS. - * - * - Set class ID to Ide2Ahci (if set to Ide2Ahci * Mode) - * - Enable Ide2Ahci interrupt - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateSataIde2Ahci ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - //program the AHCI class code - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01060100, StdHeader); - - SataBar5setting (LocalCfgPtr, &Bar5); - - // - //Set interrupt enable bit - // - RwMem ((Bar5 + 0x04), AccessWidth8, (UINT32)~0, BIT1); - ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c deleted file mode 100644 index f52f9e67ce..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c +++ /dev/null @@ -1,67 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA Ide2Ahci controller Library - * - * SATA Ide2Ahci Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_IDE2AHCILIB_FILECODE - -/** - * sataIde2AhciSetDeviceNumMsi - Program Ide2Ahci controller support - * device number cap & MSI cap - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataIde2AhciSetDeviceNumMsi ( - IN VOID *FchDataPtr - ) -{ - FCH_INTERFACE *LocalCfgPtr; - - LocalCfgPtr = (FCH_INTERFACE *)FchDataPtr; - - SataSetDeviceNumMsi (LocalCfgPtr); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c deleted file mode 100644 index 4cf3b8100e..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c +++ /dev/null @@ -1,76 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Ide2Ahci mode) - * - * Init SATA Ide2Ahci features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_IDE2AHCIMID_FILECODE - -/** - * FchInitMidSataIde2Ahci - Config SATA Ide2Ahci controller - * after PCI emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidSataIde2Ahci ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - SataIde2AhciSetDeviceNumMsi (LocalCfgPtr); - - SataBar5setting (LocalCfgPtr, &Bar5); - // - //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround. - // - if ( ! (LocalCfgPtr->Misc.S3Resume) ) { - SataDriveDetection (LocalCfgPtr, &Bar5); - } -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c deleted file mode 100644 index 3e455bfe4c..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c +++ /dev/null @@ -1,105 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Raid mode) - * - * Init SATA Raid features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_RAIDENV_FILECODE -// -// Declaration of local functions -// - -/** - * FchInitEnvSataRaid - Config SATA Raid controller before PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvSataRaid ( - IN VOID *FchDataPtr - ) -{ - UINT32 SataSSIDValue; - UINT32 DeviceId; - UINT8 EfuseValue; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - // Class code - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01040040, StdHeader); - // - // Device ID - // - SataSSIDValue = NULL; - if (LocalCfgPtr->Sata.SataRaid5Ssid != NULL ) { - SataSSIDValue = LocalCfgPtr->Sata.SataRaid5Ssid; - } - - DeviceId = FCH_SATA_RAID5_DID; - EfuseValue = SATA_EFUSE_LOCATION; - GetEfuseStatus (&EfuseValue, StdHeader); - - if (( EfuseValue & SATA_EFUSE_BIT ) || ( LocalCfgPtr->Sata.SataForceRaid == 1 )) { - DeviceId = FCH_SATA_RAID_DID; - if (LocalCfgPtr->Sata.SataRaidSsid != NULL ) { - SataSSIDValue = LocalCfgPtr->Sata.SataRaidSsid; - } - } - - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, DeviceId, StdHeader); - // - // SSID - // - if (SataSSIDValue != NULL ) { - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG2C, AccessWidth32, 0, SataSSIDValue, StdHeader); - } -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c deleted file mode 100644 index f77d206df9..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c +++ /dev/null @@ -1,65 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Raid mode) - * - * Init SATA Raid features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_RAIDLATE_FILECODE -// -// Declaration of local functions -// - -/** - * FchInitLateSataRaid - Prepare SATA Raid controller to boot to - * OS. - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateSataRaid ( - IN VOID *FchDataPtr - ) -{ -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c deleted file mode 100644 index b7e0d5bd05..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c +++ /dev/null @@ -1,69 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA AHCI/RAID controller Library - * - * SATA AHCI/RAID Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_RAIDLIB_FILECODE - -/** - * sataRaidSetDeviceNumMsi - Program RAID controller support - * device number cap & MSI cap - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataRaidSetDeviceNumMsi ( - IN VOID *FchDataPtr - ) -{ - FCH_INTERFACE *LocalCfgPtr; - - LocalCfgPtr = (FCH_INTERFACE *)FchDataPtr; - - SataSetDeviceNumMsi (LocalCfgPtr); -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c deleted file mode 100644 index 7763e369bd..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c +++ /dev/null @@ -1,74 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller (Raid mode) - * - * Init SATA Raid features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_RAIDMID_FILECODE -// -// Declaration of local functions -// - -/** - * FchInitMidSataRaid - Config SATA Raid controller after PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidSataRaid ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - SataRaidSetDeviceNumMsi (LocalCfgPtr); - SataBar5setting (LocalCfgPtr, &Bar5); - ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c deleted file mode 100644 index e5a84a9571..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c +++ /dev/null @@ -1,105 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller - * - * Init SATA features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAENV_FILECODE - -extern VOID FchInitEnvProgramSataPciRegs (IN VOID *FchDataPtr); - -/** - * FchInitEnvSata - Config SATA controller before PCI emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvSata ( - IN VOID *FchDataPtr - ) -{ - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - if ( LocalCfgPtr->Sata.SataMode.SataEnable == 0 ) { - return; //return if SATA controller is disabled. - } - - FchInitEnvProgramSataPciRegs (FchDataPtr); - // - // Call Sub-function for each Sata mode - // - if (( LocalCfgPtr->Sata.SataClass == SataAhci7804) || (LocalCfgPtr->Sata.SataClass == SataAhci )) { - FchInitEnvSataAhci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataIde2Ahci) || (LocalCfgPtr->Sata.SataClass == SataIde2Ahci7804 )) { - FchInitEnvSataIde2Ahci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataNativeIde) || (LocalCfgPtr->Sata.SataClass == SataLegacyIde )) { - FchInitEnvSataIde ( LocalCfgPtr ); - } - - if ( LocalCfgPtr->Sata.SataClass == SataRaid) { - FchInitEnvSataRaid ( LocalCfgPtr ); - } - - // - // SATA IRQ Resource - // - SataSetIrqIntResource (LocalCfgPtr, StdHeader); - - // - // SATA PHY Programming Sequence - // - FchProgramSataPhy (StdHeader); - - SataDisableWriteAccess (StdHeader); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c deleted file mode 100644 index d4d85b5075..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c +++ /dev/null @@ -1,88 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA controller Library - * - * SATA Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAENVLIB_FILECODE - -/** - * sataSetIrqIntResource - Config SATA IRQ/INT# resource - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * @param[in] StdHeader - * - */ -VOID -SataSetIrqIntResource ( - IN VOID *FchDataPtr, - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - UINT8 ValueByte; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - // - // IRQ14/IRQ15 come from IDE or SATA - // - ValueByte = 0x08; - LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC00, &ValueByte, StdHeader); - LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGC01, &ValueByte, StdHeader); - ValueByte = ValueByte & 0x0F; - - if (LocalCfgPtr->Sata.SataClass == SataLegacyIde) { - ValueByte = ValueByte | 0x50; - } else { - if (LocalCfgPtr->Sata.SataIdeMode == 1) { - // - // Both IDE & SATA set to Native mode - // - ValueByte = ValueByte | 0xF0; - } - } - - LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC01, &ValueByte, StdHeader); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c deleted file mode 100644 index 5b19e7930f..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c +++ /dev/null @@ -1,103 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA (IDE mode) controller - * - * Init SATA IDE (Native IDE) mode features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAIDEENV_FILECODE - -/** - * FchInitEnvSataIde - Config SATA IDE controller before PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitEnvSataIde ( - IN VOID *FchDataPtr - ) -{ - UINT8 ChannelByte; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - // Class code - // - if ( LocalCfgPtr->Sata.SataClass == SataLegacyIde ) { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01018A40, StdHeader); - } else { - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG08), AccessWidth32, 0, 0x01018F40, StdHeader); - } - // - // Device ID - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG02), AccessWidth16, 0, FCH_SATA_DID, StdHeader); - // - // SSID - // - if (LocalCfgPtr->Sata.SataIdeSsid != NULL ) { - RwPci ((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG2C, AccessWidth32, 0x00, LocalCfgPtr->Sata.SataIdeSsid, StdHeader); - } - // - // Sata IDE Channel configuration - // - ChannelByte = 0x00; - ReadPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48 + 3), AccessWidth8, &ChannelByte, StdHeader); - ChannelByte &= 0xCF; - - if ( LocalCfgPtr->Sata.SataDisUnusedIdePChannel ) { - ChannelByte |= 0x10; - } - - if ( LocalCfgPtr->Sata.SataDisUnusedIdeSChannel ) { - ChannelByte |= 0x20; - } - - WritePci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG48 + 3), AccessWidth8, &ChannelByte, StdHeader); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c deleted file mode 100644 index 98e12cf13c..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c +++ /dev/null @@ -1,71 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA (IDE mode) controller - * - * Init SATA IDE (Native IDE) mode features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAIDELATE_FILECODE - -/** - * FchInitLateSataIde - Prepare SATA controller to boot to OS. - * - * - Set class ID to AHCI (if set to AHCI * Mode) - * - Enable AHCI interrupt - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateSataIde ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - SataBar5setting (LocalCfgPtr, &Bar5); - ShutdownUnconnectedSataPortClock (LocalCfgPtr, Bar5); -} - - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c deleted file mode 100644 index 2607b6c8c7..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c +++ /dev/null @@ -1,46 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA Ide controller Library - * - * SATA Ide2Ahci Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAIDELIB_FILECODE diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c deleted file mode 100644 index 2aca675167..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c +++ /dev/null @@ -1,75 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA (IDE mode) controller - * - * Init SATA IDE (Native IDE) mode features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAIDEMID_FILECODE - -/** - * FchInitMidSataIde - Config SATA controller after PCI - * emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidSataIde ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - Bar5 = 0; - SataBar5setting (LocalCfgPtr, &Bar5); - // - //If this is not S3 resume and also if SATA set to one of IDE mode, then implement drive detection workaround. - // - if ( ! (LocalCfgPtr->Misc.S3Resume) ) { - SataDriveDetection (LocalCfgPtr, &Bar5); - } -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c deleted file mode 100644 index 4973ac5d6d..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c +++ /dev/null @@ -1,118 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller - * - * Init SATA features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 46088 $ @e \$Date: 2011-01-28 11:24:26 +0800 (Fri, 28 Jan 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATALATE_FILECODE - -extern VOID FchInitLateProgramSataRegs (IN VOID *FchDataPtr); - -/** - * FchInitLateSata - Prepare SATA controller to boot to OS. - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitLateSata ( - IN VOID *FchDataPtr - ) -{ - UINT8 SataPciCommandByte; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - //Return immediately is sata controller is not enabled - // - if ( LocalCfgPtr->Sata.SataMode.SataEnable == 0 ) { - return; - } - - // - // Set Sata PCI Configuration Space Write enable - // - SataEnableWriteAccess (StdHeader); - - // - // Set Sata Controller Memory & IO access enable - // - ReadPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, &SataPciCommandByte, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, 0xFF, 0x03, StdHeader); - - // - // Call Sub-function for each Sata mode - // - if (( LocalCfgPtr->Sata.SataClass == SataAhci7804) || (LocalCfgPtr->Sata.SataClass == SataAhci )) { - FchInitLateSataAhci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataIde2Ahci) || (LocalCfgPtr->Sata.SataClass == SataIde2Ahci7804 )) { - FchInitLateSataIde2Ahci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataNativeIde) || (LocalCfgPtr->Sata.SataClass == SataLegacyIde )) { - FchInitLateSataIde ( LocalCfgPtr ); - } - - if ( LocalCfgPtr->Sata.SataClass == SataRaid) { - FchInitLateSataRaid ( LocalCfgPtr ); - } - - FchInitLateProgramSataRegs ( LocalCfgPtr ); - - // - // Restore Sata Controller Memory & IO access status - // - WritePci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, &SataPciCommandByte, StdHeader); - - // - // Set Sata PCI Configuration Space Write disable - // - SataDisableWriteAccess (StdHeader); -} - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c deleted file mode 100644 index e88d51ef04..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c +++ /dev/null @@ -1,260 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Fch SATA controller Library - * - * SATA Library - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 46088 $ @e \$Date: 2011-01-28 11:24:26 +0800 (Fri, 28 Jan 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATALIB_FILECODE - -extern VOID FchSataSetDeviceNumMsi (IN VOID *FchDataPtr); - -/** - * sataBar5setting - Config SATA BAR5 - * - * - * @param[in] FchDataPtr - Fch configuration structure pointer. - * @param[in] *Bar5Ptr - SATA BAR5 buffer. - * - */ -VOID -SataBar5setting ( - IN VOID *FchDataPtr, - IN UINT32 *Bar5Ptr - ) -{ - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - // - //Get BAR5 value - // - ReadPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG24), AccessWidth32, Bar5Ptr, StdHeader); - - // - //Assign temporary BAR if is not already assigned - // - if ( (*Bar5Ptr == 0) || (*Bar5Ptr == - 1) ) { - // - //assign temporary BAR5 - // - if ( (LocalCfgPtr->Sata.TempMmio == 0) || (LocalCfgPtr->Sata.TempMmio == - 1) ) { - *Bar5Ptr = 0xFEC01000; - } else { - *Bar5Ptr = LocalCfgPtr->Sata.TempMmio; - } - WritePci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG24), AccessWidth32, Bar5Ptr, StdHeader); - } - - // - //Clear Bits 9:0 - // - *Bar5Ptr = *Bar5Ptr & 0xFFFFFC00; -} - -/** - * sataEnableWriteAccess - Enable Sata PCI configuration space - * - * @param[in] StdHeader - * - */ -VOID -SataEnableWriteAccess ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - // - // BIT0 Enable write access to PCI header - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40), AccessWidth8, 0xff, BIT0, StdHeader); -} - -/** - * sataDisableWriteAccess - Disable Sata PCI configuration space - * - * @param[in] StdHeader - * - */ -VOID -SataDisableWriteAccess ( - IN AMD_CONFIG_PARAMS *StdHeader - ) -{ - // - // Disable write access to PCI header - // - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG40), AccessWidth8, ~BIT0, 0, StdHeader); -} - - - -#ifdef SATA_BUS_DEV_FUN_FPGA - -/** - * FchSataBar5settingFpga - * - * @param[in] LocalCfgPtr - * @param[in] Bar5 - * - */ -VOID -FchSataBar5settingFpga ( - IN FCH_DATA_BLOCK *LocalCfgPtr, - IN UINT32 *Bar5 - ) -{ - UINT8 Value; - - //Get BAR5 value - ReadPci (((SATA_BUS_DEV_FUN_FPGA << 16) + FCH_SATA_REG24), AccWidthUint32, Bar5); - - //Assign temporary BAR if is not already assigned - if ( (*Bar5 == 0) || (*Bar5 == - 1) ) { - //assign temporary BAR5 - if ( (LocalCfgPtr->Sata.TempMMIO == 0) || (LocalCfgPtr->Sata.TempMMIO == - 1) ) { - *Bar5 = 0xFEC01000; - } else { - *Bar5 = LocalCfgPtr->Sata.TempMMIO; - } - WritePci (((SATA_BUS_DEV_FUN_FPGA << 16) + FCH_SATA_REG24), AccWidthUint32, Bar5); - } - - //Clear Bits 9:0 - *Bar5 = *Bar5 & 0xFFFFFC00; - Value = 0x07; - WritePci (((SATA_BUS_DEV_FUN_FPGA << 16) + 0x04), AccWidthUint8, &Value); - WritePci (((PCIB_BUS_DEV_FUN << 16) + 0x04), AccWidthUint8, &Value); -} - -/** - * FchSataDriveDetectionFpga - * - * @param[in] LocalCfgPtr - * @param[in] Bar5 - * - */ -VOID -FchSataDriveDetectionFpga ( - IN FCH_DATA_BLOCK *LocalCfgPtr, - IN UINT32 *Bar5 - ) -{ - UINT32 SataBarFpgaInfo; - UINT8 PortNum; - UINT8 SataFpaPortType; - UINT16 IoBase; - UINT16 SataFpgaLoopVarWord; - AMD_CONFIG_PARAMS *StdHeader; - - StdHeader = LocalCfgPtr->StdHeader; - - TRACE ((DMSG_FCH_TRACE, "FCH - Entering sata drive detection procedure\n\n")); - TRACE ((DMSG_FCH_TRACE, "SATA BAR5 is %X \n", *pBar5)); - - for ( PortNum = 0; PortNum < 4; PortNum++ ) { - ReadMem (*Bar5 + FCH_SATA_BAR5_REG128 + PortNum * 0x80, AccWidthUint32, &SataBarFpgaInfo); - if ( ( SataBarFpgaInfo & 0x0F ) == 0x03 ) { - if ( PortNum & BIT0 ) { - //this port belongs to secondary channel - ReadPci (((UINT32) (SATA_BUS_DEV_FUN_FPGA << 16) + FCH_SATA_REG18), AccWidthUint16, &IoBase); - } else { - //this port belongs to primary channel - ReadPci (((UINT32) (SATA_BUS_DEV_FUN_FPGA << 16) + FCH_SATA_REG10), AccWidthUint16, &IoBase); - } - - //if legacy ide mode, then the bar registers don't contain the correct values. So we need to hardcode them - if ( LocalCfgPtr->Sata.SataClass == SataLegacyIde ) { - IoBase = ( (0x170) | ((UINT16) ( (~((UINT8) (PortNum & BIT0) << 7)) & 0x80 )) ); - } - - if ( PortNum & BIT1 ) { - //this port is slave - SataFpaPortType = 0xB0; - } else { - //this port is master - SataFpaPortType = 0xA0; - } - - IoBase &= 0xFFF8; - LibAmdIoWrite (AccessWidth8, IoBase + 6, &SataFpaPortType, StdHeader); - - //Wait in loop for 30s for the drive to become ready - for ( SataFpgaLoopVarWord = 0; SataFpgaLoopVarWord < 300000; SataFpgaLoopVarWord++ ) { - LibAmdIoRead (AccessWidth8, IoBase + 7, &SataFpaPortType, StdHeader); - if ( (SataFpaPortType & 0x88) == 0 ) { - break; - } - FchStall (100, StdHeader); - } - } - } -} - -/** - * FchSataDriveFpga - - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchSataDriveFpga ( - IN VOID *FchDataPtr - ) -{ - UINT32 Bar5; - FCH_DATA_BLOCK *LocalCfgPtr; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - - Bar5 = 0; - SataBar5setting (LocalCfgPtr, &Bar5); - - FchSataBar5settingFpga (LocalCfgPtr, &Bar5); - FchSataDriveDetectionFpga (LocalCfgPtr, &Bar5); -} - -#endif - diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c deleted file mode 100644 index d9497ea2a7..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c +++ /dev/null @@ -1,198 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch SATA controller - * - * Init SATA features. - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATAMID_FILECODE - -extern VOID FchInitMidProgramSataRegs (IN VOID *FchDataPtr); - -/** - * FchInitMidSata - Config SATA controller after PCI emulation - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitMidSata ( - IN VOID *FchDataPtr - ) -{ - UINT8 SataPciCommandByte; - FCH_DATA_BLOCK *LocalCfgPtr; - AMD_CONFIG_PARAMS *StdHeader; - - LocalCfgPtr = (FCH_DATA_BLOCK *) FchDataPtr; - StdHeader = LocalCfgPtr->StdHeader; - - if ( LocalCfgPtr->Sata.SataMode.SataEnable == 0 ) { - return; ///return if SATA controller is disabled. - } - - // - // Set Sata PCI Configuration Space Write enable - // - SataEnableWriteAccess (StdHeader); - - // - // Set Sata Controller Memory & IO access enable - // - ReadPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, &SataPciCommandByte, StdHeader); - RwPci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, 0xFF, 0x03, StdHeader); - - // - // Sata Bar5 register setting for Index 0xFC - // - SataBar5RegSet ( LocalCfgPtr ); - - FchInitMidProgramSataRegs ( LocalCfgPtr ); - - // - // Set Sata port mode (each) for Gen1/Gen2/Gen3 - // - SataSetPortGenMode ( LocalCfgPtr ); - - // - // Call Sub-function for each Sata mode - // - if (( LocalCfgPtr->Sata.SataClass == SataAhci7804) || (LocalCfgPtr->Sata.SataClass == SataAhci )) { - FchInitMidSataAhci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataIde2Ahci) || (LocalCfgPtr->Sata.SataClass == SataIde2Ahci7804 )) { - FchInitMidSataIde2Ahci ( LocalCfgPtr ); - } - - if (( LocalCfgPtr->Sata.SataClass == SataNativeIde) || (LocalCfgPtr->Sata.SataClass == SataLegacyIde )) { - FchInitMidSataIde ( LocalCfgPtr ); - } - - if ( LocalCfgPtr->Sata.SataClass == SataRaid) { - FchInitMidSataRaid ( LocalCfgPtr ); - } - -#ifdef SATA_BUS_DEV_FUN_FPGA - FchSataDriveFpga ( LocalCfgPtr ); -#endif - - // - // Restore Sata Controller Memory & IO access status - // - WritePci (((SATA_BUS_DEV_FUN << 16) + FCH_SATA_REG04), AccessWidth8, &SataPciCommandByte, StdHeader); - - // - // Set Sata PCI Configuration Space Write disable - // - SataDisableWriteAccess (StdHeader); -} - -/** - * SataSetDeviceNumMsi - Program Sata controller support device - * number cap & MSI cap - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataSetDeviceNumMsi ( - IN VOID *FchDataPtr - ) -{ - FchSataSetDeviceNumMsi ( FchDataPtr ); -} - -/** - * SataDriveDetection - Sata drive detection - * - * - Sata Ide & Sata Ide to Ahci only - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * @param[in] *Bar5Ptr Sata BAR5 base address. - * - */ -VOID -SataDriveDetection ( - IN VOID *FchDataPtr, - IN UINT32 *Bar5Ptr - ) -{ - FchSataDriveDetection ( FchDataPtr, Bar5Ptr ); -} - -/** - * shutdownUnconnectedSataPortClock - Shutdown unconnected Sata port clock - * - * - Sata Ide & Sata Ide to Ahci only - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * @param[in] Bar5 Sata BAR5 base address. - * - */ -VOID -ShutdownUnconnectedSataPortClock ( - IN VOID *FchDataPtr, - IN UINT32 Bar5 - ) -{ - FchShutdownUnconnectedSataPortClock ( FchDataPtr, Bar5); -} - -/** - * SataSetPortGenMode - Set Sata port mode (each) for - * Gen1/Gen2/Gen3 - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -SataSetPortGenMode ( - IN VOID *FchDataPtr - ) -{ - FchSataSetPortGenMode ( FchDataPtr ); -} diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c deleted file mode 100644 index b6d92ded89..0000000000 --- a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c +++ /dev/null @@ -1,65 +0,0 @@ -/* $NoKeywords:$ */ -/** - * @file - * - * Config Fch Sata controller - * - * Init Sata Controller features (PEI phase). - * - * @xrefitem bom "File Content Label" "Release Content" - * @e project: AGESA - * @e sub-project: FCH - * @e \$Revision: 45603 $ @e \$Date: 2011-01-19 14:29:05 +0800 (Wed, 19 Jan 2011) $ - * - */ -/* -***************************************************************************** -* -* Copyright (c) 2011, Advanced Micro Devices, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of Advanced Micro Devices, Inc. nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -**************************************************************************** -*/ -#include "FchPlatform.h" -#include "Filecode.h" -#define FILECODE PROC_FCH_SATA_SATARESET_FILECODE - -extern VOID FchInitResetSataProgram (IN VOID *FchDataPtr); - -/** - * FchInitResetSata - Config Sata controller during Power-On - * - * - * - * @param[in] FchDataPtr Fch configuration structure pointer. - * - */ -VOID -FchInitResetSata ( - IN VOID *FchDataPtr - ) -{ - FchInitResetSataProgram ( FchDataPtr ); -} - |