diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c')
-rwxr-xr-x | src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c new file mode 100755 index 0000000000..3d62d0051a --- /dev/null +++ b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c @@ -0,0 +1,94 @@ +/* $NoKeywords:$ */ +/** + * @file + * + * Config Fch Imc controller + * + * Init Imc Controller features (PEI phase). + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: FCH + * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $ + * + */ +/* +***************************************************************************** +* +* Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +**************************************************************************** +*/ +#include "FchPlatform.h" +#define FILECODE PROC_FCH_IMC_IMCRESET_FILECODE + +/** + * FchInitResetImc - Config Imc controller during Power-On + * + * + * + * @param[in] FchDataPtr Fch configuration structure pointer. + * + */ +VOID +FchInitResetImc ( + IN VOID *FchDataPtr + ) +{ + UINT8 PortStatusByte; + AMD_CONFIG_PARAMS *StdHeader; + + StdHeader = &((AMD_RESET_PARAMS *)FchDataPtr)->StdHeader; + GetChipSysMode (&PortStatusByte, StdHeader); + + if ( ((PortStatusByte & ChipSysEcEnable) == 0x00) ) { + // + // EC is disabled by jumper setting or board config + // + RwPci (((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REGA4), AccessWidth16, 0xFFFE, BIT0, StdHeader); + } else { + RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REGC4, AccessWidth8, 0xF7, 0x08); + FchInitResetEc (FchDataPtr); + // ecPowerOnInit ( FchDataPtr); + ImcSleep (FchDataPtr); + } +} + +/** + * FchInitRecoveryLpc - Config Imc controller during Crisis + * Recovery + * + * + * + * @param[in] FchDataPtr Fch configuration structure pointer. + * + */ +VOID +FchInitRecoveryImc ( + IN VOID *FchDataPtr + ) +{ +} + |