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diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c
deleted file mode 100644
index e1f8c60511..0000000000
--- a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c
+++ /dev/null
@@ -1,200 +0,0 @@
-/* $NoKeywords:$ */
-/**
- * @file
- *
- * Config Fch HwAcpi controller
- *
- * Init HwAcpi Controller features (PEI phase).
- *
- * @xrefitem bom "File Content Label" "Release Content"
- * @e project: AGESA
- * @e sub-project: FCH
- * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
- *
- */
-/*
-*****************************************************************************
-*
-* Copyright (c) 2011, Advanced Micro Devices, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Advanced Micro Devices, Inc. nor the names of
- * its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-****************************************************************************
-*/
-#include "FchPlatform.h"
-#include "Filecode.h"
-#define FILECODE PROC_FCH_HWACPI_HWACPIRESET_FILECODE
-
-extern ACPI_REG_WRITE FchInitResetAcpiMmioTable[];
-extern VOID ProgramFchHwAcpiResetP (IN VOID *FchDataPtr);
-
-/**
- * FchInitResetHwAcpiP - Config HwAcpi controller ( Preliminary
- * ) during Power-On
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitResetHwAcpiP (
- IN VOID *FchDataPtr
- )
-{
- FCH_RESET_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr;
-
- StdHeader = &((AMD_RESET_PARAMS *)FchDataPtr)->StdHeader;
-
- //
- // Enabled (Mmio_mem_enable)
- //
- RwPmio (FCH_PMIOA_REG24, AccessWidth8, 0xFF, BIT0, StdHeader);
-
- ProgramFchHwAcpiResetP (FchDataPtr);
-
- //
- // enable CF9
- //
- RwPmio (0xD2, AccessWidth8, ~BIT6, 0, StdHeader);
-}
-
-/**
- * FchInitResetHwAcpi - Config HwAcpi controller during Power-On
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitResetHwAcpi (
- IN VOID *FchDataPtr
- )
-{
- UINT16 SmbusBase;
- UINT8 Value;
- UINT16 AsfPort;
- FCH_RESET_DATA_BLOCK *LocalCfgPtr;
- AMD_CONFIG_PARAMS *StdHeader;
-
- LocalCfgPtr = (FCH_RESET_DATA_BLOCK *) FchDataPtr;
- StdHeader = LocalCfgPtr->StdHeader;
-
- //
- // Set Build option into SB
- //
- WritePci ((LPC_BUS_DEV_FUN << 16) + FCH_LPC_REG64, AccessWidth16, &(UserOptions.CfgSioPmeBaseAddress), StdHeader);
-
- //
- // Enabled SMBUS0/SMBUS1 (ASF) Base Address
- //
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG2C, AccessWidth16, 06, (UserOptions.CfgSmbus0BaseAddress) + BIT0); ///protect BIT[2:1]
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG28, AccessWidth16, 06, (UserOptions.CfgSmbus1BaseAddress) + BIT0);
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG60, AccessWidth16, 00, (UserOptions.CfgAcpiPm1EvtBlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG62, AccessWidth16, 00, (UserOptions.CfgAcpiPm1CntBlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG64, AccessWidth16, 00, (UserOptions.CfgAcpiPmTmrBlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG66, AccessWidth16, 00, (UserOptions.CfgCpuControlBlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG68, AccessWidth16, 00, (UserOptions.CfgAcpiGpe0BlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG6A, AccessWidth16, 00, (UserOptions.CfgSmiCmdPortAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG6C, AccessWidth16, 00, (UserOptions.CfgAcpiPmaCntBlkAddr));
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG6E, AccessWidth16, 00, (UserOptions.CfgSmiCmdPortAddr) + 8);
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG48, AccessWidth32, 00, (UserOptions.CfgWatchDogTimerBase));
-
- RwMem (ACPI_MMIO_BASE + PMIO_BASE + FCH_PMIOA_REG2E, AccessWidth8, ~(BIT1 + BIT2), 0); ///clear BIT[2:1]
- SmbusBase = (UINT16) (UserOptions.CfgSmbus0BaseAddress);
- Value = 0x00;
- LibAmdIoWrite (AccessWidth8, SmbusBase + 0x14, &Value, StdHeader);
-
- ProgramFchAcpiMmioTbl ((ACPI_REG_WRITE*) (&FchInitResetAcpiMmioTable[0]), StdHeader);
-
- //
- // Prevent RTC error
- //
- Value = 0x0A;
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REG70, &Value, StdHeader);
- LibAmdIoRead (AccessWidth8, FCH_IOMAP_REG71, &Value, StdHeader);
- Value &= 0xEF;
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REG71, &Value, StdHeader);
-
- Value = 0x08;
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC00, &Value, StdHeader);
- LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGC01, &Value, StdHeader);
- if ( !LocalCfgPtr->EcKbd ) {
- //
- // Route SIO IRQ1/IRQ12 to USB IRQ1/IRQ12 input
- //
- Value = Value | 0x0A;
- }
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC01, &Value, StdHeader);
-
- Value = 0x09;
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC00, &Value, StdHeader);
- LibAmdIoRead (AccessWidth8, FCH_IOMAP_REGC01, &Value, StdHeader);
- if ( !LocalCfgPtr->EcKbd ) {
- //
- // Route SIO IRQ1/IRQ12 to USB IRQ1/IRQ12 input
- //
- Value = Value & 0xF9;
- }
-
- if ( LocalCfgPtr->LegacyFree ) {
- //
- // Disable IRQ1/IRQ12 filter enable for Legacy free with USB KBC emulation.
- //
- Value = Value & 0x9F;
- }
- //
- // Enabled IRQ input
- //
- Value = Value | BIT4;
- LibAmdIoWrite (AccessWidth8, FCH_IOMAP_REGC01, &Value, StdHeader);
-
- AsfPort = ((UINT16) UserOptions.CfgSmbus1BaseAddress & 0xFFF0);
- if ( AsfPort != 0 ) {
- UINT8 dbValue;
- dbValue = 0x70;
- LibAmdIoWrite (AccessWidth8, AsfPort + 0x0E, &dbValue, StdHeader);
- }
-}
-
-/**
- * FchInitRecoveryHwAcpi - Config HwAcpi controller during
- * Crisis Recovery
- *
- *
- *
- * @param[in] FchDataPtr Fch configuration structure pointer.
- *
- */
-VOID
-FchInitRecoveryHwAcpi (
- IN VOID *FchDataPtr
- )
-{
-}
-
-