diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f10/Proc/Mem/Tech')
-rw-r--r-- | src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c index b5e76352d8..cfe30a96aa 100644 --- a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c +++ b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c @@ -150,7 +150,7 @@ MemTDIMMPresence3 ( UINT8 Channel; UINT8 i; MEM_PARAMETER_STRUCT *RefPtr; - UINT8 *SpdBufferPtr; + UINT8 *SpdBufferPtr = NULL; DIE_STRUCT *MCTPtr; DCT_STRUCT *DCTPtr; CH_DEF_STRUCT *ChannelPtr; @@ -399,7 +399,7 @@ MemTSPDGetTargetSpeed3 ( IN OUT MEM_TECH_BLOCK *TechPtr ) { - UINT8 *SpdBufferPtr; + UINT8 *SpdBufferPtr = NULL; UINT8 Dimm; UINT8 Dct; UINT8 Channel; @@ -477,8 +477,8 @@ MemTSPDCalcWidth3 ( IN OUT MEM_TECH_BLOCK *TechPtr ) { - UINT8 *SpdBufferAPtr; - UINT8 *SpdBufferBPtr; + UINT8 *SpdBufferAPtr = NULL; + UINT8 *SpdBufferBPtr = NULL; MEM_NB_BLOCK *NBPtr; DIE_STRUCT *MCTPtr; DCT_STRUCT *DCTPtr; @@ -586,7 +586,7 @@ MemTAutoCycTiming3 ( SPD_TFAW }; - UINT8 *SpdBufferPtr; + UINT8 *SpdBufferPtr = NULL; UINT16 MiniMaxTmg[GET_SIZE_OF (SpdIndexes)]; UINT8 MiniMaxTrfc[4]; @@ -712,7 +712,7 @@ MemTSPDSetBanks3 ( IN OUT MEM_TECH_BLOCK *TechPtr ) { - UINT8 *SpdBufferPtr; + UINT8 *SpdBufferPtr = NULL; UINT8 i; UINT8 ChipSel; UINT8 DimmID; @@ -909,7 +909,7 @@ MemTSPDGetTCL3 ( IN OUT MEM_TECH_BLOCK *TechPtr ) { - UINT8 *SpdBufferPtr; + UINT8 *SpdBufferPtr = NULL; UINT8 CLdesired; UINT8 CLactual; UINT8 Dimm; |