diff options
Diffstat (limited to 'src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c')
| -rwxr-xr-x | src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c | 154 |
1 files changed, 154 insertions, 0 deletions
diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c new file mode 100755 index 0000000000..ef52322d12 --- /dev/null +++ b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c @@ -0,0 +1,154 @@ +/** + * @file + * + * AMD Family_10 Pstate feature support functions. + * + * Provides the functions necessary to initialize the Pstate feature. + * + * @xrefitem bom "File Content Label" "Release Content" + * @e project: AGESA + * @e sub-project: CPU/F10 + * @e \$Revision: 18309 $ @e \$Date: 2009-08-27 15:48:22 +0800 (Thu, 27 Aug 2009) $ + * + */ +/* + ****************************************************************************** + * + * Copyright (c) 2011, Advanced Micro Devices, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Advanced Micro Devices, Inc. nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/*---------------------------------------------------------------------------------------- + * M O D U L E S U S E D + *---------------------------------------------------------------------------------------- + */ +#include "AGESA.h" +#include "amdlib.h" +#include "cpuPstateTables.h" +#include "Table.h" +#include "cpuFamilyTranslation.h" +#include "cpuFamRegisters.h" +#include "CommonReturns.h" +#include "Filecode.h" +#define FILECODE PROC_CPU_FAMILY_0X10_CPUF10PSTATE_FILECODE + +/*---------------------------------------------------------------------------------------- + * D E F I N I T I O N S A N D M A C R O S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * T Y P E D E F S A N D S T R U C T U R E S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * P R O T O T Y P E S O F L O C A L F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ + +/*---------------------------------------------------------------------------------------- + * E X P O R T E D F U N C T I O N S + *---------------------------------------------------------------------------------------- + */ +extern BUILD_OPT_CFG UserOptions; + +/*---------------------------------------------------------------------------------------*/ +/** + * Family specific call to check if Pstate PSD is dependent. + * + * @param[in] PstateCpuServices Pstate CPU services. + * @param[in,out] PlatformConfig Contains the runtime modifiable feature input data. + * @param[in] StdHeader Config Handle for library, services. + * + * @retval TRUE PSD is dependent. + * @retval FALSE PSD is independent. + * + */ +BOOLEAN +STATIC +F10IsPstatePsdDependent ( + IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, + IN OUT PLATFORM_CONFIGURATION *PlatformConfig, + IN AMD_CONFIG_PARAMS *StdHeader + ) +{ + CPU_LOGICAL_ID CpuLogicalId; + PLATFORM_FEATS Features; + + // Initialize the union + Features.PlatformValue = 0; + GetLogicalIdOfCurrentCore (&CpuLogicalId, StdHeader); + GetPlatformFeatures (&Features, PlatformConfig, StdHeader); + + // + // RevC Single link has PSD option, default is dependent. + // If multi-link, always return independent. + // + if ((Features.PlatformFeatures.PlatformSingleLink) && ((CpuLogicalId.Revision & AMD_F10_Cx) != 0)) { + if (PlatformConfig->ForcePstateIndependent) { + return FALSE; + } + return TRUE; + } + return FALSE; +} + +/** + * Family specific call to set core TscFreqSel. + * + * @param[in] PstateCpuServices Pstate CPU services. + * @param[in] StdHeader Config Handle for library, services. + * + */ +VOID +STATIC +F10SetTscFreqSel ( + IN PSTATE_CPU_FAMILY_SERVICES *PstateCpuServices, + IN AMD_CONFIG_PARAMS *StdHeader + ) +{ + UINT64 MsrValue; + + LibAmdMsrRead (MSR_HWCR, &MsrValue, StdHeader); + if (UserOptions.OptionMultisocket) { + // + // If Agesa need to do p-state leveling on multi-socket, changing the P0 + // frequency after setting this bit has no effect on the TSC rate. + // + ASSERT ((MsrValue & BIT24) == 0); + } + MsrValue = MsrValue | BIT24; + LibAmdMsrWrite (MSR_HWCR, &MsrValue, StdHeader); +} + +CONST PSTATE_CPU_FAMILY_SERVICES ROMDATA F10PstateServices = +{ + 0, + F10IsPstatePsdDependent, + F10SetTscFreqSel +}; |