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-rw-r--r--src/superio/winbond/Kconfig4
-rw-r--r--src/superio/winbond/Makefile.inc1
-rw-r--r--src/superio/winbond/w83667hg-a/Makefile.inc19
-rw-r--r--src/superio/winbond/w83667hg-a/superio.c110
-rw-r--r--src/superio/winbond/w83667hg-a/w83667hg-a.h48
5 files changed, 182 insertions, 0 deletions
diff --git a/src/superio/winbond/Kconfig b/src/superio/winbond/Kconfig
index ba9f4791e6..1731a7f0f4 100644
--- a/src/superio/winbond/Kconfig
+++ b/src/superio/winbond/Kconfig
@@ -39,6 +39,10 @@ config SUPERIO_WINBOND_W83627UHG
bool
select SUPERIO_WINBOND_COMMON_ROMSTAGE
+config SUPERIO_WINBOND_W83667HG_A
+ bool
+ select SUPERIO_WINBOND_COMMON_ROMSTAGE
+
config SUPERIO_WINBOND_W83697HF
bool
select SUPERIO_WINBOND_COMMON_ROMSTAGE
diff --git a/src/superio/winbond/Makefile.inc b/src/superio/winbond/Makefile.inc
index 67927dc708..ae4b283d3c 100644
--- a/src/superio/winbond/Makefile.inc
+++ b/src/superio/winbond/Makefile.inc
@@ -21,6 +21,7 @@ subdirs-y += w83627ehg
subdirs-y += w83627hf
subdirs-y += w83627thg
subdirs-y += w83627uhg
+subdirs-y += w83667hg-a
subdirs-y += w83697hf
subdirs-y += w83977tf
subdirs-y += wpcd376i
diff --git a/src/superio/winbond/w83667hg-a/Makefile.inc b/src/superio/winbond/w83667hg-a/Makefile.inc
new file mode 100644
index 0000000000..7665046acd
--- /dev/null
+++ b/src/superio/winbond/w83667hg-a/Makefile.inc
@@ -0,0 +1,19 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2011 - 2012 Advanced Micro Devices, Inc.
+## Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
+## Copyright (C) 2015 Raptor Engineering
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ramstage-$(CONFIG_SUPERIO_WINBOND_W83667HG_A) += superio.c
diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c
new file mode 100644
index 0000000000..96eddd7310
--- /dev/null
+++ b/src/superio/winbond/w83667hg-a/superio.c
@@ -0,0 +1,110 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
+ * Copyright (C) 2015 - 2016 Raptor Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <pc80/keyboard.h>
+#include <pc80/mc146818rtc.h>
+#include <stdlib.h>
+#include <superio/conf_mode.h>
+
+#include "w83667hg-a.h"
+
+#define MAINBOARD_POWER_OFF 0
+#define MAINBOARD_POWER_ON 1
+
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#endif
+
+static void w83667hg_a_init(struct device *dev)
+{
+ uint8_t byte;
+ uint8_t power_status;
+
+ if (!dev->enabled)
+ return;
+
+ switch(dev->path.pnp.device) {
+ /* TODO: Might potentially need code for HWM or FDC etc. */
+ case W83667HG_A_KBC:
+ pc_keyboard_init();
+ break;
+ case W83667HG_A_ACPI:
+ /* Set power state after power fail */
+ power_status = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ get_option(&power_status, "power_on_after_fail");
+ pnp_enter_conf_mode_8787(dev);
+ pnp_set_logical_device(dev);
+ byte = pnp_read_config(dev, 0xe4);
+ byte &= ~0x60;
+ if (power_status == 1)
+ byte |= (0x1 << 5); /* Force power on */
+ else if (power_status == 2)
+ byte |= (0x2 << 5); /* Use last power state */
+ pnp_write_config(dev, 0xe4, byte);
+ pnp_exit_conf_mode_aa(dev);
+ printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");
+ break;
+ }
+}
+
+static struct device_operations ops = {
+ .read_resources = pnp_read_resources,
+ .set_resources = pnp_set_resources,
+ .enable_resources = pnp_enable_resources,
+ .enable = pnp_alt_enable,
+ .init = w83667hg_a_init,
+ .ops_pnp_mode = &pnp_conf_mode_8787_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, W83667HG_A_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
+ { &ops, W83667HG_A_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x0ff8, 0}, },
+ { &ops, W83667HG_A_SP1, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, W83667HG_A_SP2, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, W83667HG_A_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x0fff, 0}, {0x0fff, 4}, },
+ { &ops, W83667HG_A_SPI, PNP_IO1, {0x0ff8, 0}},
+ { &ops, W83667HG_A_WDT1},
+ { &ops, W83667HG_A_ACPI},
+ { &ops, W83667HG_A_HWM_TSI, PNP_IO0 | PNP_IRQ0, {0x0ffe, 0}, },
+ { &ops, W83667HG_A_PECI},
+ { &ops, W83667HG_A_VID_BUSSEL},
+ { &ops, W83667HG_A_GPIO_PP_OD},
+ { &ops, W83667HG_A_GPIO1},
+ { &ops, W83667HG_A_GPIO2},
+ { &ops, W83667HG_A_GPIO3},
+ { &ops, W83667HG_A_GPIO4},
+ { &ops, W83667HG_A_GPIO5},
+ { &ops, W83667HG_A_GPIO6},
+ { &ops, W83667HG_A_GPIO7},
+ { &ops, W83667HG_A_GPIO8},
+ { &ops, W83667HG_A_GPIO9},
+};
+
+static void enable_dev(struct device *dev)
+{
+ pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_winbond_w83667hg_a_ops = {
+ CHIP_NAME("WINBOND W83667HG-A Super I/O")
+ .enable_dev = enable_dev,
+};
diff --git a/src/superio/winbond/w83667hg-a/w83667hg-a.h b/src/superio/winbond/w83667hg-a/w83667hg-a.h
new file mode 100644
index 0000000000..2a8c5110b0
--- /dev/null
+++ b/src/superio/winbond/w83667hg-a/w83667hg-a.h
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
+ * Copyright (C) 2015 Raptor Engineering
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SUPERIO_WINBOND_W83667HG_A
+#define SUPERIO_WINBOND_W83667HG_A
+
+/* Logical Device Numbers (LDN). */
+#define W83667HG_A_FDC 0x00
+#define W83667HG_A_PP 0x01
+#define W83667HG_A_SP1 0x02 /* Com1 */
+#define W83667HG_A_SP2 0x03 /* Com2 */
+#define W83667HG_A_KBC 0x05
+#define W83667HG_A_SPI 0x06
+#define W83667HG_A_GPIO6789_V 0x07
+#define W83667HG_A_WDT1 0x08
+#define W83667HG_A_GPIO2345_V 0x09
+#define W83667HG_A_ACPI 0x0A
+#define W83667HG_A_HWM_TSI 0x0B /* HW monitor/SB-TSI/deep S5 */
+#define W83667HG_A_PECI 0x0C
+#define W83667HG_A_VID_BUSSEL 0x0D /* VID and BUSSEL */
+#define W83667HG_A_GPIO_PP_OD 0x0F /* GPIO Push-Pull/Open drain select */
+
+/* virtual LDN for GPIO */
+#define W83667HG_A_GPIO1 ((1 << 8) | W83667HG_A_WDT1)
+#define W83667HG_A_GPIO2 ((0 << 8) | W83667HG_A_GPIO2345_V)
+#define W83667HG_A_GPIO3 ((1 << 8) | W83667HG_A_GPIO2345_V)
+#define W83667HG_A_GPIO4 ((2 << 8) | W83667HG_A_GPIO2345_V)
+#define W83667HG_A_GPIO5 ((3 << 8) | W83667HG_A_GPIO2345_V)
+#define W83667HG_A_GPIO6 ((1 << 8) | W83667HG_A_GPIO6789_V)
+#define W83667HG_A_GPIO7 ((2 << 8) | W83667HG_A_GPIO6789_V)
+#define W83667HG_A_GPIO8 ((3 << 8) | W83667HG_A_GPIO6789_V)
+#define W83667HG_A_GPIO9 ((4 << 8) | W83667HG_A_GPIO6789_V)
+
+#endif /* SUPERIO_WINBOND_W83667HG_A */
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-03 14:01:36 +0000