6 files changed, 134 insertions, 0 deletions
diff --git a/src/superio/smsc/Makefile.inc b/src/superio/smsc/Makefile.inc
index e77ca497fd..86cf9c510f 100644
--- a/src/superio/smsc/Makefile.inc
+++ b/src/superio/smsc/Makefile.inc
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 subdirs-y += fdc37n972
+subdirs-y += lpc47m10x
 subdirs-y += lpc47m15x
 subdirs-y += lpc47n207
 subdirs-y += lpc47n217
diff --git a/src/superio/smsc/lpc47m10x/Kconfig b/src/superio/smsc/lpc47m10x/Kconfig
new file mode 100644
index 0000000000..9d6b9481b1
--- /dev/null
+++ b/src/superio/smsc/lpc47m10x/Kconfig
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config SUPERIO_SMSC_LPC47M10X
+	bool
diff --git a/src/superio/smsc/lpc47m10x/Makefile.inc b/src/superio/smsc/lpc47m10x/Makefile.inc
new file mode 100644
index 0000000000..d0d4cbc28c
--- /dev/null
+++ b/src/superio/smsc/lpc47m10x/Makefile.inc
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+bootblock-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += early_serial.c
+romstage-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += early_serial.c
+ramstage-$(CONFIG_SUPERIO_SMSC_LPC47M10X) += superio.c
diff --git a/src/superio/smsc/lpc47m10x/early_serial.c b/src/superio/smsc/lpc47m10x/early_serial.c
new file mode 100644
index 0000000000..38a13f56a7
--- /dev/null
+++ b/src/superio/smsc/lpc47m10x/early_serial.c
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <arch/io.h>
+#include <device/pnp_ops.h>
+#include <device/pnp.h>
+#include <stdint.h>
+#include "lpc47m10x.h"
+
+void pnp_enter_conf_state(pnp_devfn_t dev)
+{
+	u16 port = dev >> 8;
+	outb(0x55, port);
+}
+
+void pnp_exit_conf_state(pnp_devfn_t dev)
+{
+	u16 port = dev >> 8;
+	outb(0xaa, port);
+}
+
+/**
+ * Configure the base I/O port of the specified serial device and enable the
+ * serial device.
+ *
+ * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
+ * @param iobase Processor I/O port address to assign to this serial device.
+ */
+void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase)
+{
+	pnp_enter_conf_state(dev);
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+	pnp_exit_conf_state(dev);
+}
diff --git a/src/superio/smsc/lpc47m10x/lpc47m10x.h b/src/superio/smsc/lpc47m10x/lpc47m10x.h
new file mode 100644
index 0000000000..b8bd3a0246
--- /dev/null
+++ b/src/superio/smsc/lpc47m10x/lpc47m10x.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef SUPERIO_SMSC_LPC47M10X_H
+#define SUPERIO_SMSC_LPC47M10X_H
+
+#include <device/pnp_type.h>
+#include <stdint.h>
+
+#define LPC47M10X2_FDC	0	/* Floppy */
+#define LPC47M10X2_PP	3	/* Parallel Port */
+#define LPC47M10X2_SP1	4	/* Com1 */
+#define LPC47M10X2_SP2	5	/* Com2 */
+#define LPC47M10X2_KBC	7	/* Keyboard & Mouse */
+#define LPC47M10X2_GAME	9	/* GAME */
+#define LPC47M10X2_PME	10	/* PME reg*/
+#define LPC47M10X2_MPU	11	/* MPU-401 MIDI */
+
+#define LPC47M10X2_MAX_CONFIG_REGISTER	0x5F
+
+void lpc47m10x_enable_serial(pnp_devfn_t dev, u16 iobase);
+
+void pnp_enter_conf_state(pnp_devfn_t dev);
+void pnp_exit_conf_state(pnp_devfn_t dev);
+
+#endif /* SUPERIO_SMSC_LPC47M10X_H */
diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c
new file mode 100644
index 0000000000..cb297a5b14
--- /dev/null
+++ b/src/superio/smsc/lpc47m10x/superio.c
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <pc80/keyboard.h>
+
+#include "lpc47m10x.h"
+
+/**
+ * Initialize the specified Super I/O device.
+ *
+ * Devices other than COM ports and the keyboard controller are ignored.
+ * For COM ports, we configure the baud rate.
+ *
+ * @param dev Pointer to structure describing a Super I/O device.
+ */
+static void lpc47m10x_init(struct device *dev)
+{
+	if (!dev->enabled)
+		return;
+
+	switch (dev->path.pnp.device) {
+	case LPC47M10X2_KBC:
+		pc_keyboard_init(NO_AUX_DEVICE);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_alt_enable,
+	.init             = lpc47m10x_init,
+	.ops_pnp_mode     = &pnp_conf_mode_55_aa,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+	{ NULL, LPC47M10X2_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+	{ NULL, LPC47M10X2_PP,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+	{ NULL, LPC47M10X2_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+	{ NULL, LPC47M10X2_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+	{ NULL, LPC47M10X2_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
+		0x07ff, 0x07ff, },
+	{ NULL, LPC47M10X2_PME, PNP_IO0, 0x0f80, },
+};
+
+/**
+ * Create device structures and allocate resources to devices specified in the
+ * pnp_dev_info array (above).
+ *
+ * @param dev Pointer to structure describing a Super I/O device.
+ */
+static void enable_dev(struct device *dev)
+{
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_smsc_lpc47m10x_ops = {
+	CHIP_NAME("SMSC LPC47M10x Super I/O")
+	.enable_dev = enable_dev
+};