1 files changed, 0 insertions, 67 deletions
diff --git a/src/superio/winbond/w83627hf/early_serial.c b/src/superio/winbond/w83627hf/early_serial.c
deleted file mode 100644
index a87c7e98fa..0000000000
--- a/src/superio/winbond/w83627hf/early_serial.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- * Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include "w83627hf.h"
-
-static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0x87, port);
-	outb(0x87, port);
-}
-
-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
-{
-	u16 port = dev >> 8;
-	outb(0xaa, port);
-}
-
-/*
- * FIXME: The following ROMCC boards are blocking the removal this superio's
- * model specific w83627hf_enable_serial() symbol.
- *
- * mainboard/supermicro/x6dai_g
- * mainboard/supermicro/x6dhe_g
- * mainboard/supermicro/x6dhr_ig
- * mainboard/supermicro/x6dhr_ig2
- *
- * XXX: ROMCC -  everything is inlined, no forwarding function prototypes
- * declarations are accepted.
- */
-void w83627hf_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
-	pnp_enter_ext_func_mode(dev);
-	pnp_set_logical_device(dev);
-	pnp_set_enable(dev, 0);
-	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
-	pnp_set_enable(dev, 1);
-	pnp_exit_ext_func_mode(dev);
-}
-
-void w83627hf_set_clksel_48(pnp_devfn_t dev)
-{
-	u8 reg8;
-
-	pnp_enter_ext_func_mode(dev);
-	reg8 = pnp_read_config(dev, 0x24);
-	reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
-	pnp_write_config(dev, 0x24, reg8);
-	pnp_exit_ext_func_mode(dev);
-}