diff options
Diffstat (limited to 'src/superio/nuvoton/nct5104d/superio.c')
| -rw-r--r-- | src/superio/nuvoton/nct5104d/superio.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c index 69f54a731f..6836d695c0 100644 --- a/src/superio/nuvoton/nct5104d/superio.c +++ b/src/superio/nuvoton/nct5104d/superio.c @@ -14,7 +14,9 @@ * GNU General Public License for more details. */ +#include <console/console.h> #include <device/pnp.h> +#include <device/device.h> #include <superio/conf_mode.h> #include "nct5104d.h" @@ -147,6 +149,29 @@ static void reset_gpio_default_od(struct device *dev) pnp_write_config(dev, NCT5104D_GPIO6_PP_OD, 0xFF); } +static void disable_gpio_io_port(struct device *dev) +{ + struct device *gpio0, *gpio1, *gpio6; + + /* + * Since UARTC and UARTD share pins with GPIO0 and GPIO1 and the + * GPIO/UART can be selected via Kconfig, check whether at least one of + * GPIOs is enabled and if yes keep the GPIO IO VLDN enabled. If no + * GPIOs are enabled, disable the VLDN in order to protect from invalid + * devicetree + Kconfig settings. + */ + gpio0 = dev_find_slot_pnp(dev->path.pnp.port, NCT5104D_GPIO0); + gpio1 = dev_find_slot_pnp(dev->path.pnp.port, NCT5104D_GPIO1); + gpio6 = dev_find_slot_pnp(dev->path.pnp.port, NCT5104D_GPIO6); + + if (!((gpio0 && gpio0->enabled) || (gpio1 && gpio1->enabled) || + (gpio6 && gpio6->enabled))) { + dev->enabled = 0; + printk(BIOS_WARNING, "WARNING: GPIO IO port configured," + " but no GPIO enabled. Disabling..."); + } +} + static void nct5104d_init(struct device *dev) { struct superio_nuvoton_nct5104d_config *conf = dev->chip_info; @@ -177,6 +202,9 @@ static void nct5104d_init(struct device *dev) case NCT5104D_GPIO_PP_OD: reset_gpio_default_od(dev); break; + case NCT5104D_GPIO_IO: + disable_gpio_io_port(dev); + break; default: break; } @@ -204,6 +232,7 @@ static struct pnp_info pnp_dev_info[] = { { NULL, NCT5104D_GPIO1}, { NULL, NCT5104D_GPIO6}, { NULL, NCT5104D_GPIO_PP_OD}, + { NULL, NCT5104D_GPIO_IO, PNP_IO0, 0x07f8, }, { NULL, NCT5104D_PORT80}, }; |