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-rw-r--r--src/superio/fintek/f71805f/superio.c10
-rw-r--r--src/superio/fintek/f71808a/superio.c10
-rw-r--r--src/superio/fintek/f71859/superio.c2
-rw-r--r--src/superio/fintek/f71863fg/superio.c14
-rw-r--r--src/superio/fintek/f71869ad/superio.c14
-rw-r--r--src/superio/fintek/f71872/superio.c14
-rw-r--r--src/superio/fintek/f81216h/superio.c8
-rw-r--r--src/superio/fintek/f81865f/superio.c12
-rw-r--r--src/superio/fintek/f81866d/superio.c20
9 files changed, 52 insertions, 52 deletions
diff --git a/src/superio/fintek/f71805f/superio.c b/src/superio/fintek/f71805f/superio.c
index 8df904c689..c03d10fa75 100644
--- a/src/superio/fintek/f71805f/superio.c
+++ b/src/superio/fintek/f71805f/superio.c
@@ -41,11 +41,11 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
+ { &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ &ops, F71805F_GPIO, PNP_IRQ0, },
{ &ops, F71805F_PME, },
};
diff --git a/src/superio/fintek/f71808a/superio.c b/src/superio/fintek/f71808a/superio.c
index ee84dafcc0..eef724290c 100644
--- a/src/superio/fintek/f71808a/superio.c
+++ b/src/superio/fintek/f71808a/superio.c
@@ -54,12 +54,12 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { &ops, F71808A_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71808A_HWM, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71808A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
+ { &ops, F71808A_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71808A_HWM, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71808A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71808A_GPIO, PNP_IRQ0, },
- { &ops, F71808A_WDT, PNP_IO0, {0x07f8, 0},},
- { &ops, F71808A_CIR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F71808A_WDT, PNP_IO0, 0x07f8,},
+ { &ops, F71808A_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71808A_PME, },
};
diff --git a/src/superio/fintek/f71859/superio.c b/src/superio/fintek/f71859/superio.c
index e710a45fc5..6de68df501 100644
--- a/src/superio/fintek/f71859/superio.c
+++ b/src/superio/fintek/f71859/superio.c
@@ -42,7 +42,7 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { &ops, F71859_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F71859_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
};
static void enable_dev(struct device *dev)
diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c
index c108503b3b..3ed269e677 100644
--- a/src/superio/fintek/f71863fg/superio.c
+++ b/src/superio/fintek/f71863fg/superio.c
@@ -50,14 +50,14 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { &ops, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, F71863FG_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
+ { &ops, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+ { &ops, F71863FG_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71863FG_GPIO, },
- { &ops, F71863FG_VID, PNP_IO0, {0x07f8, 0}, },
+ { &ops, F71863FG_VID, PNP_IO0, 0x07f8, },
{ &ops, F71863FG_SPI, },
{ &ops, F71863FG_PME, },
};
diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c
index 6999a13978..43a9ee61cc 100644
--- a/src/superio/fintek/f71869ad/superio.c
+++ b/src/superio/fintek/f71869ad/superio.c
@@ -106,15 +106,15 @@ static struct device_operations ops = {
*
*/
static struct pnp_info pnp_dev_info[] = {
- { &ops, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
+ { &ops, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+ { &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71869AD_GPIO, },
{ &ops, F71869AD_WDT, },
- { &ops, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71869AD_PME, },
};
diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c
index d617cb4e26..c2163bd9cc 100644
--- a/src/superio/fintek/f71872/superio.c
+++ b/src/superio/fintek/f71872/superio.c
@@ -48,14 +48,14 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
- { &ops, F71872_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71872_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71872_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71872_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, F71872_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
- { &ops, F71872_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
+ { &ops, F71872_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71872_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71872_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F71872_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F71872_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
+ { &ops, F71872_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71872_GPIO, PNP_IRQ0, },
- { &ops, F71872_VID, PNP_IO0, {0x0ff8, 0}, },
+ { &ops, F71872_VID, PNP_IO0, 0x0ff8, },
{ &ops, F71872_PM, },
};
diff --git a/src/superio/fintek/f81216h/superio.c b/src/superio/fintek/f81216h/superio.c
index 26a719ef23..17483c3177 100644
--- a/src/superio/fintek/f81216h/superio.c
+++ b/src/superio/fintek/f81216h/superio.c
@@ -94,10 +94,10 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, F81216H_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F81216H_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F81216H_SP3, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F81216H_SP4, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
+ { &ops, F81216H_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F81216H_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F81216H_SP3, PNP_IO0 | PNP_IRQ0, 0x07f8, },
+ { &ops, F81216H_SP4, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F81216H_WDT, },
};
diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c
index 09d47fbd18..5bc4f6e35b 100644
--- a/src/superio/fintek/f81865f/superio.c
+++ b/src/superio/fintek/f81865f/superio.c
@@ -48,12 +48,12 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
- { &ops, F81865F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F81865F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81865F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81865F_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
- { &ops, F81865F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F81865F_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
+ { &ops, F81865F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F81865F_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81865F_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81865F_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
+ { &ops, F81865F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F81865F_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ &ops, F81865F_GPIO, PNP_IRQ0, },
{ &ops, F81865F_PME, },
};
diff --git a/src/superio/fintek/f81866d/superio.c b/src/superio/fintek/f81866d/superio.c
index 775e2e8169..938019d4b5 100644
--- a/src/superio/fintek/f81866d/superio.c
+++ b/src/superio/fintek/f81866d/superio.c
@@ -70,16 +70,16 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
- { &ops, F81866D_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F81866D_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_SP3, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_SP4, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_SP5, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_SP6, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, F81866D_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, { 0x07ff, 0}, },
- { &ops, F81866D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
- { &ops, F81866D_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0}, },
+ { &ops, F81866D_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F81866D_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_SP3, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_SP4, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_SP5, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_SP6, PNP_IO0 | PNP_IRQ0, 0x7f8, },
+ { &ops, F81866D_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
+ { &ops, F81866D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
+ { &ops, F81866D_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ &ops, F81866D_GPIO, PNP_IRQ0, },
{ &ops, F81866D_PME, },
{ &ops, F81866D_WDT, },