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-rw-r--r--src/superio/fintek/f71869ad/Makefile.inc1
-rw-r--r--src/superio/fintek/f71869ad/early_serial.c68
-rw-r--r--src/superio/fintek/f71869ad/f71869ad.h2
3 files changed, 0 insertions, 71 deletions
diff --git a/src/superio/fintek/f71869ad/Makefile.inc b/src/superio/fintek/f71869ad/Makefile.inc
index 12efbebeb8..117239a2bf 100644
--- a/src/superio/fintek/f71869ad/Makefile.inc
+++ b/src/superio/fintek/f71869ad/Makefile.inc
@@ -18,5 +18,4 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-romstage-$(CONFIG_SUPERIO_FINTEK_F71869AD) += early_serial.c
ramstage-$(CONFIG_SUPERIO_FINTEK_F71869AD) += superio.c
diff --git a/src/superio/fintek/f71869ad/early_serial.c b/src/superio/fintek/f71869ad/early_serial.c
deleted file mode 100644
index 85184007ac..0000000000
--- a/src/superio/fintek/f71869ad/early_serial.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/*
- * Pre-RAM driver for the Fintek F71869AD Super I/O chip.
- *
- * Derived from p.34 in vendor data-sheet:
- *
- * - default index port : 0x4E
- * - default data port : 0x4F
- *
- * - enable configuration : 0x87
- * - disable configuration : 0xAA
- *
- */
-
-#include <arch/io.h>
-#include <device/pnp.h>
-#include "f71869ad.h"
-
-/*
- * Enable configuration: pass entry key '0x87' into index port dev.
- */
-static void pnp_enter_conf_state(device_t dev)
-{
- u16 port = dev >> 8;
- outb(0x87, port);
- outb(0x87, port);
-}
-
-/*
- * Disable configuration: pass exit key '0xAA' into index port dev.
- */
-static void pnp_exit_conf_state(device_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-/*
- * Bring up early serial debugging output before the RAM is initialized.
- */
-void f71869ad_enable_serial(device_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
index 43a4397451..3aeac56b82 100644
--- a/src/superio/fintek/f71869ad/f71869ad.h
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -32,6 +32,4 @@
#define F71869AD_BSEL 0x07 /* BSEL */
#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
-void f71869ad_enable_serial(device_t dev, u16 iobase);
-
#endif /* SUPERIO_FINTEK_F71869AD_H */