3 files changed, 4 insertions, 5 deletions
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
index fd00f6c50e..04e0bc9909 100644
--- a/src/southbridge/intel/lynxpoint/Makefile.inc
+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
@@ -46,6 +46,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c pmutil.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me_9.x.c pch.c
 smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c usb_ehci.c usb_xhci.c
 
+bootblock-y += early_pch.c
 romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c
 romstage-y += early_spi.c rcba.c pmutil.c
 
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index 69fdd611d2..39e69257eb 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -79,4 +79,7 @@ void bootblock_early_southbridge_init(void)
 
 	/* Enable upper 128bytes of CMOS */
 	RCBA32(RC) = (1 << 2);
+
+	pch_enable_lpc();
+	mainboard_config_superio();
 }
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index f615507dad..c36257747d 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -104,8 +104,6 @@ int early_pch_init(const void *gpio_map,
 {
 	int wake_from_s3;
 
-	pch_enable_lpc();
-
 	pch_enable_bars();
 
 #if CONFIG(INTEL_LYNXPOINT_LP)
@@ -113,9 +111,6 @@ int early_pch_init(const void *gpio_map,
 #else
 	setup_pch_gpios(gpio_map);
 #endif
-
-	mainboard_config_superio();
-
 	pch_generic_setup();
 
 	/* Enable SMBus for reading SPDs. */