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-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/cfg.c2
-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/cfg.h2
-rw-r--r--src/southbridge/amd/cimx_wrapper/sb800/late.c3
3 files changed, 3 insertions, 4 deletions
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/cfg.c b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c
index 371f53beb4..09ff9b6c6c 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/cfg.c
+++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.c
@@ -83,7 +83,7 @@ void sb800_cimx_config(AMDSBCFG *sb_config)
sb_config->SATAMODE.SataMode.SataController = SATA_CONTROLLER;
sb_config->SATAMODE.SataMode.SataIdeCombMdPriSecOpt = 0; //0 -IDE as primary, 1 -IDE as secondary.
//TODO: set to secondary not take effect.
- sb_config->SATAMODE.SataMode.SataIdeCombinedMode = 0; //IDE controlor exposed and combined mode enabled
+ sb_config->SATAMODE.SataMode.SataIdeCombinedMode = 1; //IDE controllor is hidden
sb_config->SATAMODE.SataMode.SATARefClkSel = SATA_CLOCK_SOURCE;
/* Azalia HDA */
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/cfg.h b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h
index e12a69e035..e89daca381 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/cfg.h
+++ b/src/southbridge/amd/cimx_wrapper/sb800/cfg.h
@@ -109,7 +109,7 @@
* NOTE: DO NOT ALLOW SATA & IDE use same mode
*/
#ifndef SATA_MODE
- #define SATA_MODE NATIVE_IDE_MODE
+ #define SATA_MODE AHCI_MODE
#endif
/**
diff --git a/src/southbridge/amd/cimx_wrapper/sb800/late.c b/src/southbridge/amd/cimx_wrapper/sb800/late.c
index e2c36b0be5..45689d7627 100644
--- a/src/southbridge/amd/cimx_wrapper/sb800/late.c
+++ b/src/southbridge/amd/cimx_wrapper/sb800/late.c
@@ -138,10 +138,9 @@ static struct device_operations sata_ops = {
static const struct pci_driver sata_driver __pci_driver = {
.ops = &sata_ops,
.vendor = PCI_VENDOR_ID_ATI,
- .device = PCI_DEVICE_ID_ATI_SB800_SATA, //SATA IDE Mode 4390
+ .device = PCI_DEVICE_ID_ATI_SB800_SATA_AHCI,
};
-
#if CONFIG_USBDEBUG
static void usb_set_resources(struct device *dev)
{