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-rw-r--r--src/southbridge/nvidia/ck804/Makefile.inc2
-rw-r--r--src/southbridge/nvidia/ck804/nic.c2
-rw-r--r--src/southbridge/nvidia/ck804/romstrap.ld (renamed from src/southbridge/nvidia/ck804/romstrap.lds)0
-rw-r--r--src/southbridge/nvidia/mcp55/Makefile.inc2
-rw-r--r--src/southbridge/nvidia/mcp55/nic.c2
-rw-r--r--src/southbridge/nvidia/mcp55/romstrap.ld (renamed from src/southbridge/nvidia/mcp55/romstrap.lds)0
-rw-r--r--src/southbridge/sis/sis966/Makefile.inc2
-rw-r--r--src/southbridge/sis/sis966/romstrap.ld (renamed from src/southbridge/sis/sis966/romstrap.lds)0
-rw-r--r--src/southbridge/via/k8t890/Makefile.inc2
-rw-r--r--src/southbridge/via/k8t890/romstrap.ld (renamed from src/southbridge/via/k8t890/romstrap.lds)0
10 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc
index db145d08a8..dacfc9c8c5 100644
--- a/src/southbridge/nvidia/ck804/Makefile.inc
+++ b/src/southbridge/nvidia/ck804/Makefile.inc
@@ -20,4 +20,4 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc
-chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds
+chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.ld
diff --git a/src/southbridge/nvidia/ck804/nic.c b/src/southbridge/nvidia/ck804/nic.c
index b827dcffd4..1207a95419 100644
--- a/src/southbridge/nvidia/ck804/nic.c
+++ b/src/southbridge/nvidia/ck804/nic.c
@@ -90,7 +90,7 @@ static void nic_init(struct device *dev)
/* If that is invalid we will read that from romstrap. */
if (!eeprom_valid) {
u32 *mac_pos;
- mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.lds. */
+ mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.ld. */
mac_l = read32(mac_pos) + nic_index;
mac_h = read32(mac_pos + 1);
}
diff --git a/src/southbridge/nvidia/ck804/romstrap.lds b/src/southbridge/nvidia/ck804/romstrap.ld
index 4d7996f771..4d7996f771 100644
--- a/src/southbridge/nvidia/ck804/romstrap.lds
+++ b/src/southbridge/nvidia/ck804/romstrap.ld
diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc
index 03a34eb71c..b4dc460b59 100644
--- a/src/southbridge/nvidia/mcp55/Makefile.inc
+++ b/src/southbridge/nvidia/mcp55/Makefile.inc
@@ -19,4 +19,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc
-chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds
+chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.ld
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index 136d060d0b..d8f691af14 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -162,7 +162,7 @@ static void nic_init(struct device *dev)
// if that is invalid we will read that from romstrap
if(!eeprom_valid) {
u32 *mac_pos;
- mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.lds
+ mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.ld
mac_l = read32(mac_pos) + nic_index; // overflow?
mac_h = read32(mac_pos + 1);
diff --git a/src/southbridge/nvidia/mcp55/romstrap.lds b/src/southbridge/nvidia/mcp55/romstrap.ld
index 784e7d5f0f..784e7d5f0f 100644
--- a/src/southbridge/nvidia/mcp55/romstrap.lds
+++ b/src/southbridge/nvidia/mcp55/romstrap.ld
diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc
index 1a9ea65429..5c696222d9 100644
--- a/src/southbridge/sis/sis966/Makefile.inc
+++ b/src/southbridge/sis/sis966/Makefile.inc
@@ -14,4 +14,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc
-chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds
+chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.ld
diff --git a/src/southbridge/sis/sis966/romstrap.lds b/src/southbridge/sis/sis966/romstrap.ld
index 784e7d5f0f..784e7d5f0f 100644
--- a/src/southbridge/sis/sis966/romstrap.lds
+++ b/src/southbridge/sis/sis966/romstrap.ld
diff --git a/src/southbridge/via/k8t890/Makefile.inc b/src/southbridge/via/k8t890/Makefile.inc
index 6d9407d03b..1c5ff3fefa 100644
--- a/src/southbridge/via/k8t890/Makefile.inc
+++ b/src/southbridge/via/k8t890/Makefile.inc
@@ -9,4 +9,4 @@ ramstage-y += error.c
ramstage-y += chrome.c
chipset_bootblock_inc += $(src)/southbridge/via/k8t890/romstrap.inc
-chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.lds
+chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.ld
diff --git a/src/southbridge/via/k8t890/romstrap.lds b/src/southbridge/via/k8t890/romstrap.ld
index 235769d0c9..235769d0c9 100644
--- a/src/southbridge/via/k8t890/romstrap.lds
+++ b/src/southbridge/via/k8t890/romstrap.ld