diff options
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/amd/amd8111/reset.c | 56 | ||||
-rw-r--r-- | src/southbridge/broadcom/bcm5785/reset.c | 23 | ||||
-rw-r--r-- | src/southbridge/nvidia/ck804/reset.c | 23 | ||||
-rw-r--r-- | src/southbridge/nvidia/mcp55/reset.c | 23 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/reset.c | 23 |
5 files changed, 28 insertions, 120 deletions
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c index 3cc1a0a5d3..fd2c82ab5b 100644 --- a/src/southbridge/amd/amd8111/reset.c +++ b/src/southbridge/amd/amd8111/reset.c @@ -1,48 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h> #include <device/pci_ids.h> -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) - -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) - -static void pci_write_config8(pci_devfn_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} #define PCI_DEV_INVALID (0xffffffffU) -static pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus) +static pci_devfn_t pci_io_locate_device_on_bus(unsigned pci_id, unsigned bus) { pci_devfn_t dev, last; dev = PCI_DEV(bus, 0, 0); last = PCI_DEV(bus, 31, 7); for (; dev <= last; dev += PCI_DEV(0,0,1)) { unsigned int id; - id = pci_read_config32(dev, 0); + id = pci_io_read_config32(dev, 0); if (id == pci_id) { return dev; } @@ -52,7 +37,6 @@ static pci_devfn_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus) #include "../../../northbridge/amd/amdk8/reset_test.c" - void hard_reset(void) { pci_devfn_t dev; @@ -64,11 +48,11 @@ void hard_reset(void) * There can only be one 8111 on a hypertransport chain/bus. */ bus = node_link_to_bus(node, link); - dev = pci_locate_device_on_bus( + dev = pci_io_locate_device_on_bus( PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA), bus); /* Reset */ set_bios_reset(); - pci_write_config8(dev, 0x47, 1); + pci_io_write_config8(dev, 0x47, 1); } diff --git a/src/southbridge/broadcom/bcm5785/reset.c b/src/southbridge/broadcom/bcm5785/reset.c index 82ff0fd984..7511d29ed5 100644 --- a/src/southbridge/broadcom/bcm5785/reset.c +++ b/src/southbridge/broadcom/bcm5785/reset.c @@ -14,30 +14,11 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h> -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) - -static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - #include "../../../northbridge/amd/amdk8/reset_test.c" void hard_reset(void) diff --git a/src/southbridge/nvidia/ck804/reset.c b/src/southbridge/nvidia/ck804/reset.c index 004ad585b4..ad994dedc4 100644 --- a/src/southbridge/nvidia/ck804/reset.c +++ b/src/southbridge/nvidia/ck804/reset.c @@ -14,30 +14,11 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h> -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) - -static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = (dev >> 4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) -{ - unsigned addr; - addr = (dev >> 4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - #include "../../../northbridge/amd/amdk8/reset_test.c" void hard_reset(void) diff --git a/src/southbridge/nvidia/mcp55/reset.c b/src/southbridge/nvidia/mcp55/reset.c index 12cac29832..a381cd31a9 100644 --- a/src/southbridge/nvidia/mcp55/reset.c +++ b/src/southbridge/nvidia/mcp55/reset.c @@ -17,30 +17,11 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h> -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) - -static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - #include "../../../northbridge/amd/amdk8/reset_test.c" void hard_reset(void) diff --git a/src/southbridge/sis/sis966/reset.c b/src/southbridge/sis/sis966/reset.c index 12cac29832..a381cd31a9 100644 --- a/src/southbridge/sis/sis966/reset.c +++ b/src/southbridge/sis/sis966/reset.c @@ -17,30 +17,11 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <arch/io.h> #include <reset.h> -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFFF) << 20) | \ - (((DEV) & 0x1F) << 15) | \ - (((FN) & 0x7) << 12)) - -static void pci_write_config32(pci_devfn_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(pci_devfn_t dev, unsigned where) -{ - unsigned addr; - addr = (dev>>4) | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - #include "../../../northbridge/amd/amdk8/reset_test.c" void hard_reset(void) |