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-rw-r--r--src/southbridge/via/k8t890/k8t890.h4
-rw-r--r--src/southbridge/via/k8t890/k8t890_ctrl.c2
-rw-r--r--src/southbridge/via/k8t890/k8t890_early_car.c1
-rw-r--r--src/southbridge/via/vt8237r/vt8237_ctrl.c6
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.c6
-rw-r--r--src/southbridge/via/vt8237r/vt8237r.h5
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_early_smbus.c5
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_ide.c6
-rw-r--r--src/southbridge/via/vt8237r/vt8237r_lpc.c3
9 files changed, 23 insertions, 15 deletions
diff --git a/src/southbridge/via/k8t890/k8t890.h b/src/southbridge/via/k8t890/k8t890.h
index ba078f5e22..139daf91c2 100644
--- a/src/southbridge/via/k8t890/k8t890.h
+++ b/src/southbridge/via/k8t890/k8t890.h
@@ -40,8 +40,12 @@
#include <device/device.h>
+#if 0
extern void writeback(struct device *dev, u16 where, u8 what);
extern void dump_south(device_t dev);
+#endif
+#include <southbridge/via/vt8237r/vt8237r.h>
+
int k8m890_host_fb_size_get(void);
//void k8m890_host_fb_direct_set(uint32_t fb_address);
diff --git a/src/southbridge/via/k8t890/k8t890_ctrl.c b/src/southbridge/via/k8t890/k8t890_ctrl.c
index ed11534945..ad17fe624d 100644
--- a/src/southbridge/via/k8t890/k8t890_ctrl.c
+++ b/src/southbridge/via/k8t890/k8t890_ctrl.c
@@ -29,7 +29,7 @@
static void vt8237r_cfg(struct device *dev, struct device *devsb)
{
- u8 regm, regm2, regm3;
+ u8 regm, regm3;
device_t devfun3;
diff --git a/src/southbridge/via/k8t890/k8t890_early_car.c b/src/southbridge/via/k8t890/k8t890_early_car.c
index a0a269bb94..a7bb9102c4 100644
--- a/src/southbridge/via/k8t890/k8t890_early_car.c
+++ b/src/southbridge/via/k8t890/k8t890_early_car.c
@@ -59,6 +59,7 @@ u8 k8t890_early_setup_ht(void)
pci_write_config8(PCI_DEV(0, 0x0, 2), 0xa1, reg);
/* check if connected non coherent, initcomplete (find the SB on K8 side) */
+ ldtnr = 0;
if (0x7 == pci_read_config8(PCI_DEV(0, 0x18, 0), 0x98)) {
ldtnr = 0;
} else if (0x7 == pci_read_config8(PCI_DEV(0, 0x18, 0), 0xb8)) {
diff --git a/src/southbridge/via/vt8237r/vt8237_ctrl.c b/src/southbridge/via/vt8237r/vt8237_ctrl.c
index 45af37624e..08c9c54754 100644
--- a/src/southbridge/via/vt8237r/vt8237_ctrl.c
+++ b/src/southbridge/via/vt8237r/vt8237_ctrl.c
@@ -22,12 +22,13 @@
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
+#include "vt8237r.h"
/* We support here K8M890/K8T890 and VT8237/S/A PCI1/Vlink */
static void vt8237_cfg(struct device *dev)
{
- u8 regm, regm2, regm3;
+ u8 regm, regm3;
device_t devfun3;
devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
@@ -69,6 +70,7 @@ static void vt8237_cfg(struct device *dev)
regm = pci_read_config8(devfun3, 0x83);
pci_write_config8(dev, 0x63, regm);
+ // FIXME is this really supposed to be regm3?
regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */
pci_write_config8(dev, 0x64, regm);
@@ -167,8 +169,6 @@ static void ctrl_enable(struct device *dev)
pci_write_config8(dev, 0x4f, 0x43);
}
-extern void dump_south(device_t dev);
-
static void ctrl_init(struct device *dev)
{
/*
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 2b5d34bccc..be24bb5dc2 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -21,6 +21,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include "vt8237r.h"
#include "chip.h"
/*
@@ -28,11 +29,6 @@
* VT8237R_SouthBridge_Revision2.06_Lead-Free.zip
*/
-void hard_reset(void)
-{
- printk(BIOS_ERR, "NO HARD RESET ON VT8237R! FIX ME!\n");
-}
-
#if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 7
void writeback(struct device *dev, u16 where, u8 what)
{
diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index 780876ce38..4e2484511e 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -103,4 +103,9 @@ __attribute__ ((packed))
#endif
;
+#ifndef __PRE_RAM__
+void writeback(struct device *dev, u16 where, u8 what);
+void dump_south(device_t dev);
+#endif
+
#endif
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 533cbe0c88..4dd3678097 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -61,8 +61,9 @@ static void smbus_wait_until_ready(void)
PRINT_DEBUG("Waiting until SMBus ready\n");
- loops = 0;
/* Yes, this is a mess, but it's the easiest way to do it. */
+ /* XXX not so messy, but an explanation of the hack would have been better */
+ loops = 0;
while ((inb(SMBHSTSTAT) & 1) == 1 && loops < SMBUS_TIMEOUT)
++loops;
@@ -464,6 +465,8 @@ int vt8237_early_network_init(struct vt8237_network_rom *rom)
pci_write_config32(dev, 0x5c, tmp | 0x01000000); /* Toggle SEEPR. */
/* Yes, this is a mess, but it's the easiest way to do it. */
+ /* XXX not so messy, but an explanation of the hack would have been better */
+ loops = 0;
while ((((pci_read_config32(dev, 0x5c) >> 25) & 1) == 0)
&& (loops < LAN_TIMEOUT)) {
++loops;
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index 0b4dccc2f0..ecbcfffc8c 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -35,10 +35,8 @@ static void ide_init(struct device *dev)
struct southbridge_via_vt8237r_config *sb =
(struct southbridge_via_vt8237r_config *)dev->chip_info;
- u8 enables, reg8;
+ u8 enables;
u32 cablesel;
- device_t lpc_dev;
- int i, j;
printk(BIOS_INFO, "%s IDE interface %s\n", "Primary",
sb->ide0_enable ? "enabled" : "disabled");
@@ -98,6 +96,8 @@ static void ide_init(struct device *dev)
pci_write_config32(dev, IDE_UDMA, cablesel);
#if CONFIG_EPIA_VT8237R_INIT
+ device_t lpc_dev;
+
/* Set PATA Output Drive Strength */
lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index 4e09823a69..f47c8c8dff 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -34,7 +34,6 @@
#include "vt8237r.h"
#include "chip.h"
-extern void dump_south(device_t dev);
static void southbridge_init_common(struct device *dev);
#if CONFIG_EPIA_VT8237R_INIT
@@ -248,7 +247,7 @@ static void setup_pm(device_t dev)
static void vt8237r_init(struct device *dev)
{
- u8 enables, reg8;
+ u8 enables;
#if CONFIG_EPIA_VT8237R_INIT
printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n");