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-rw-r--r--src/southbridge/intel/bd82x6x/Makefile.inc1
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc
index fa21277b2a..def9cd2aa2 100644
--- a/src/southbridge/intel/bd82x6x/Makefile.inc
+++ b/src/southbridge/intel/bd82x6x/Makefile.inc
@@ -52,6 +52,7 @@ romstage-y += early_spi.c early_pch.c
romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += early_me.c
romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += early_me.c
romstage-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c
+romstage-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE) += early_thermal.c early_pch_native.c early_me_native.c
ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y)
IFD_BIN_PATH := $(objgenerated)/ifdfake.bin
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 97f20bd96a..9850fee30d 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -39,7 +39,7 @@ static void usb_ehci_init(struct device *dev)
printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
/* For others, done in MRC. */
-#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE)
+#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) || IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE)
pci_write_config32(dev, 0x84, 0x930c8811);
pci_write_config32(dev, 0x88, 0x24000d30);
pci_write_config32(dev, 0xf4, 0x80408588);
@@ -54,7 +54,7 @@ static void usb_ehci_init(struct device *dev)
pci_write_config32(dev, PCI_COMMAND, reg32);
/* For others, done in MRC. */
-#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE)
+#if IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE) || IS_ENABLED(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE)
struct resource *res;
u8 access_cntl;