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-rw-r--r--src/southbridge/intel/i82801jx/chip.h1
-rw-r--r--src/southbridge/intel/i82801jx/fadt.c2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h
index 028d5c8bf0..ba8d007fb7 100644
--- a/src/southbridge/intel/i82801jx/chip.h
+++ b/src/southbridge/intel/i82801jx/chip.h
@@ -48,7 +48,6 @@ struct southbridge_intel_i82801jx_config {
int c4onc3_enable:1;
int c5_enable : 1;
int c6_enable : 1;
- int c3_latency;
int docking_supported:1;
int throttle_duty : 3;
diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c
index f2b408b119..d99872d396 100644
--- a/src/southbridge/intel/i82801jx/fadt.c
+++ b/src/southbridge/intel/i82801jx/fadt.c
@@ -36,7 +36,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
fadt->pm_tmr_len = 4;
fadt->gpe0_blk_len = 16;
fadt->p_lvl2_lat = 1;
- fadt->p_lvl3_lat = chip->c3_latency;
+ fadt->p_lvl3_lat = 0; /* FIXME: Is this correct? */
fadt->duty_offset = 1;
fadt->duty_width = 0;
fadt->day_alrm = 0xd;