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-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_reset.c1
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_smbus.c2
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_smbus.h17
3 files changed, 1 insertions, 19 deletions
diff --git a/src/southbridge/nvidia/mcp55/mcp55_reset.c b/src/southbridge/nvidia/mcp55/mcp55_reset.c
index 614b8eed40..afc592c26b 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_reset.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_reset.c
@@ -22,6 +22,7 @@
*/
#include <arch/io.h>
+#include <reset.h>
#define PCI_DEV(BUS, DEV, FN) ( \
(((BUS) & 0xFFF) << 20) | \
diff --git a/src/southbridge/nvidia/mcp55/mcp55_smbus.c b/src/southbridge/nvidia/mcp55/mcp55_smbus.c
index 38f757e00a..fd28710d94 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_smbus.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_smbus.c
@@ -100,7 +100,6 @@ unsigned pm_base;
static void mcp55_sm_read_resources(device_t dev)
{
- struct resource *res;
unsigned long index;
/* Get the normal pci resources of this device */
@@ -110,7 +109,6 @@ static void mcp55_sm_read_resources(device_t dev)
pci_get_resource(dev, index);
}
compact_resources(dev);
-
}
static void mcp55_sm_init(device_t dev)
diff --git a/src/southbridge/nvidia/mcp55/mcp55_smbus.h b/src/southbridge/nvidia/mcp55/mcp55_smbus.h
index 410ad62c4a..d1dade9c45 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_smbus.h
+++ b/src/southbridge/nvidia/mcp55/mcp55_smbus.h
@@ -40,23 +40,6 @@ static inline void smbus_delay(void)
outb(0x80, 0x80);
}
-static int smbus_wait_until_ready(unsigned smbus_io_base)
-{
- unsigned long loops;
- loops = SMBUS_TIMEOUT;
- do {
- unsigned char val;
- smbus_delay();
- val = inb(smbus_io_base + SMBHSTSTAT);
- val &= 0x1f;
- if (val == 0) {
- return 0;
- }
- outb(val,smbus_io_base + SMBHSTSTAT);
- } while(--loops);
- return -2;
-}
-
static int smbus_wait_until_done(unsigned smbus_io_base)
{
unsigned long loops;