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-rw-r--r--src/southbridge/amd/cimx/sb700/reset.c2
-rw-r--r--src/southbridge/amd/cimx/sb800/reset.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/early.c2
-rw-r--r--src/southbridge/amd/cimx/sb900/reset.c2
-rw-r--r--src/southbridge/amd/sb600/enable_usbdebug.c2
-rw-r--r--src/southbridge/amd/sb700/enable_usbdebug.c2
-rw-r--r--src/southbridge/amd/sb700/reset.c2
-rw-r--r--src/southbridge/intel/common/usb_debug.c2
-rw-r--r--src/southbridge/nvidia/ck804/enable_usbdebug.c4
-rw-r--r--src/southbridge/nvidia/mcp55/enable_usbdebug.c4
-rw-r--r--src/southbridge/sis/sis966/enable_usbdebug.c4
11 files changed, 14 insertions, 14 deletions
diff --git a/src/southbridge/amd/cimx/sb700/reset.c b/src/southbridge/amd/cimx/sb700/reset.c
index 36f96d3767..16c56a2c83 100644
--- a/src/southbridge/amd/cimx/sb700/reset.c
+++ b/src/southbridge/amd/cimx/sb700/reset.c
@@ -36,7 +36,7 @@ static inline void set_bios_reset(void)
{
u32 nodes;
u32 htic;
- device_t dev;
+ pci_devfn_t dev;
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index 36f96d3767..16c56a2c83 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -36,7 +36,7 @@ static inline void set_bios_reset(void)
{
u32 nodes;
u32 htic;
- device_t dev;
+ pci_devfn_t dev;
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
diff --git a/src/southbridge/amd/cimx/sb900/early.c b/src/southbridge/amd/cimx/sb900/early.c
index 48799040af..198066fd03 100644
--- a/src/southbridge/amd/cimx/sb900/early.c
+++ b/src/southbridge/amd/cimx/sb900/early.c
@@ -36,7 +36,7 @@
*/
u32 get_sbdn(u32 bus)
{
- device_t dev;
+ pci_devfn_t dev;
printk(BIOS_SPEW, "SB900 - Early.c - get_sbdn - Start.\n");
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index 36f96d3767..16c56a2c83 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -36,7 +36,7 @@ static inline void set_bios_reset(void)
{
u32 nodes;
u32 htic;
- device_t dev;
+ pci_devfn_t dev;
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
diff --git a/src/southbridge/amd/sb600/enable_usbdebug.c b/src/southbridge/amd/sb600/enable_usbdebug.c
index 0e4b4240c0..d20c8c4fe1 100644
--- a/src/southbridge/amd/sb600/enable_usbdebug.c
+++ b/src/southbridge/amd/sb600/enable_usbdebug.c
@@ -34,7 +34,7 @@ void set_debug_port(unsigned int port)
void enable_usbdebug(unsigned int port)
{
- device_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */
+ pci_devfn_t dev = PCI_DEV(0, 0x13, 5); /* USB EHCI, D19:F5 */
/* Select the requested physical USB port (1-15) as the Debug Port. */
set_debug_port(port);
diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c
index f0efe412ea..00eb4d924b 100644
--- a/src/southbridge/amd/sb700/enable_usbdebug.c
+++ b/src/southbridge/amd/sb700/enable_usbdebug.c
@@ -49,7 +49,7 @@ void set_debug_port(unsigned int port)
*/
void enable_usbdebug(unsigned int port)
{
- device_t dev = PCI_DEV(0, 0x12, 2); /* USB EHCI, D18:F2 */
+ pci_devfn_t dev = PCI_DEV(0, 0x12, 2); /* USB EHCI, D18:F2 */
/* Set the EHCI BAR address. */
pci_write_config32(dev, EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c
index e457368370..ae79c4a440 100644
--- a/src/southbridge/amd/sb700/reset.c
+++ b/src/southbridge/amd/sb700/reset.c
@@ -36,7 +36,7 @@ static void set_bios_reset(void)
{
u32 nodes;
u32 htic;
- device_t dev;
+ pci_devfn_t dev;
int i;
nodes = ((pci_read_config32(PCI_DEV(CONFIG_CBB, CONFIG_CDB, 0), 0x60) >> 4) & 7) + 1;
diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index d140123da3..6b934f4fa0 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -35,7 +35,7 @@ void set_debug_port(unsigned int port)
void enable_usbdebug(unsigned int port)
{
u32 dbgctl;
- device_t dev = PCI_DEV(0, 0x1d, 7); /* USB EHCI, D29:F7 */
+ pci_devfn_t dev = PCI_DEV(0, 0x1d, 7); /* USB EHCI, D29:F7 */
/* Set the EHCI BAR address. */
pci_write_config32(dev, EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c
index 54b534ee6a..90890e6802 100644
--- a/src/southbridge/nvidia/ck804/enable_usbdebug.c
+++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c
@@ -39,7 +39,7 @@
void set_debug_port(unsigned int port)
{
u32 dword;
- device_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */
/* Write the port number to 0x74[15:12]. */
dword = pci_read_config32(dev, 0x74);
@@ -50,7 +50,7 @@ void set_debug_port(unsigned int port)
void enable_usbdebug(unsigned int port)
{
- device_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, CK804_DEVN_BASE + 2, 1); /* USB EHCI */
/* Mark the requested physical USB port (1-15) as the Debug Port. */
set_debug_port(port);
diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
index ec066538ce..069344b522 100644
--- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
@@ -33,7 +33,7 @@
void set_debug_port(unsigned int port)
{
u32 dword;
- device_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
/* Write the port number to 0x74[15:12]. */
dword = pci_read_config32(dev, 0x74);
@@ -44,7 +44,7 @@ void set_debug_port(unsigned int port)
void enable_usbdebug(unsigned int port)
{
- device_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, MCP55_DEVN_BASE + 2, 1); /* USB EHCI */
/* Mark the requested physical USB port (1-15) as the Debug Port. */
set_debug_port(port);
diff --git a/src/southbridge/sis/sis966/enable_usbdebug.c b/src/southbridge/sis/sis966/enable_usbdebug.c
index 1ff04dfbc0..f38fe90398 100644
--- a/src/southbridge/sis/sis966/enable_usbdebug.c
+++ b/src/southbridge/sis/sis966/enable_usbdebug.c
@@ -35,7 +35,7 @@
void set_debug_port(unsigned int port)
{
u32 dword;
- device_t dev = PCI_DEV(0, SIS966_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, SIS966_DEVN_BASE + 2, 1); /* USB EHCI */
/* Write the port number to 0x74[15:12]. */
dword = pci_read_config32(dev, 0x74);
@@ -46,7 +46,7 @@ void set_debug_port(unsigned int port)
void enable_usbdebug(unsigned int port)
{
- device_t dev = PCI_DEV(0, SIS966_DEVN_BASE + 2, 1); /* USB EHCI */
+ pci_devfn_t dev = PCI_DEV(0, SIS966_DEVN_BASE + 2, 1); /* USB EHCI */
/* Mark the requested physical USB port (1-15) as the Debug Port. */
set_debug_port(port);
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-22 07:51:56 +0000