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-rw-r--r--src/southbridge/intel/i82801gx/Kconfig1
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c13
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig1
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c8
4 files changed, 23 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index 2670d23c9d..7e48848c7b 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -27,6 +27,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI
select HAVE_INTEL_CHIPSET_LOCKDOWN
+ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
if SOUTHBRIDGE_INTEL_I82801GX
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index acc57a7dfb..ac83ec9500 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -32,6 +32,7 @@
#include <cbmem.h>
#include <string.h>
#include <drivers/intel/gma/i915.h>
+#include <southbridge/intel/common/acpi_pirq_gen.h>
#include "nvs.h"
#define NMI_OFF 0
@@ -718,6 +719,16 @@ static void southbridge_inject_dsdt(struct device *dev)
}
}
+static const char *lpc_acpi_name(const struct device *dev)
+{
+ return "LPCB";
+}
+
+static void southbridge_fill_ssdt(device_t device)
+{
+ intel_acpi_gen_def_acpi_pirq(device);
+}
+
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@@ -728,6 +739,8 @@ static struct device_operations device_ops = {
.enable_resources = pci_dev_enable_resources,
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
+ .acpi_fill_ssdt_generator = southbridge_fill_ssdt,
+ .acpi_name = lpc_acpi_name,
.init = lpc_init,
.scan_bus = scan_lpc_bus,
.enable = i82801gx_enable,
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index e418a94f60..2c98f72e4b 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -19,6 +19,7 @@ config SOUTHBRIDGE_INTEL_I82801JX
select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SPI
+ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select IOAPIC
select HAVE_USBDEBUG
select HAVE_HARD_RESET
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index ff86f0fddd..cd5e3078b0 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -34,6 +34,7 @@
#include "i82801jx.h"
#include "nvs.h"
#include <southbridge/intel/common/pciehp.h>
+#include <southbridge/intel/common/acpi_pirq_gen.h>
#include <drivers/intel/gma/i915.h>
#define NMI_OFF 0
@@ -720,12 +721,18 @@ static void southbridge_inject_dsdt(struct device *dev)
}
}
+static const char *lpc_acpi_name(const struct device *dev)
+{
+ return "LPCB";
+}
+
static void southbridge_fill_ssdt(struct device *device)
{
struct device *dev = dev_find_slot(0, PCI_DEVFN(0x1f,0));
config_t *chip = dev->chip_info;
intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
+ intel_acpi_gen_def_acpi_pirq(device);
}
static struct pci_operations pci_ops = {
@@ -739,6 +746,7 @@ static struct device_operations device_ops = {
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.write_acpi_tables = acpi_write_hpet,
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
+ .acpi_name = lpc_acpi_name,
.init = lpc_init,
.scan_bus = scan_lpc_bus,
.ops_pci = &pci_ops,