12 files changed, 11 insertions, 27 deletions
diff --git a/src/southbridge/amd/cs5535/cs5535.h b/src/southbridge/amd/cs5535/cs5535.h
index 0db7c17551..0b435637ee 100644
--- a/src/southbridge/amd/cs5535/cs5535.h
+++ b/src/southbridge/amd/cs5535/cs5535.h
@@ -115,7 +115,7 @@
 /* Flash Memory Mask values */
 #define FLASH_MEM_4K		0xFFFFF000
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 #if defined(__PRE_RAM__)
 void cs5535_disable_internal_uart(void);
 #else
diff --git a/src/southbridge/amd/cs5536/cs5536.h b/src/southbridge/amd/cs5536/cs5536.h
index 84738a212f..c193d9d500 100644
--- a/src/southbridge/amd/cs5536/cs5536.h
+++ b/src/southbridge/amd/cs5536/cs5536.h
@@ -442,7 +442,7 @@
 #define FLASH_IO_128B		0x0000FF80
 #define FLASH_IO_256B		0x0000FF00
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 #if defined(__PRE_RAM__)
 void cs5536_setup_onchipuart(int uart);
 void cs5536_disable_internal_uart(void);
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 7f64571c4b..39048662db 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -56,7 +56,7 @@
 void intel_pch_finalize_smm(void);
 #endif
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 #if !defined(__PRE_RAM__)
 #if !defined(__SMM__)
 #include "chip.h"
diff --git a/src/southbridge/intel/i82371eb/i82371eb.h b/src/southbridge/intel/i82371eb/i82371eb.h
index 76d5fc7085..e6062c68e8 100644
--- a/src/southbridge/intel/i82371eb/i82371eb.h
+++ b/src/southbridge/intel/i82371eb/i82371eb.h
@@ -21,26 +21,19 @@
 #ifndef SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H
 #define SOUTHBRIDGE_INTEL_I82371EB_I82371EB_H
 
-#if !defined(__ASSEMBLER__)
+#if !defined(__ASSEMBLER__) && !defined(__ACPI__)
 #if !defined(__PRE_RAM__)
-#if !defined(__ACPI__) /* dsdt include */
-
 #include <arch/io.h>
 #include <device/device.h>
 #include "chip.h"
-
 void i82371eb_enable(device_t dev);
 void i82371eb_hard_reset(void);
-
-#endif
-#endif
-#endif
-
-#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+#else
 void enable_smbus(void);
 int smbus_read_byte(u8 device, u8 address);
 void enable_pm(void);
 #endif
+#endif
 
 /* If 'cond' is true this macro sets the bit(s) specified by 'bits' in the
  * 'reg' variable, otherwise it clears those bits.
diff --git a/src/southbridge/intel/i82801ax/i82801ax.h b/src/southbridge/intel/i82801ax/i82801ax.h
index ed15bba5fd..f459f2f20a 100644
--- a/src/southbridge/intel/i82801ax/i82801ax.h
+++ b/src/southbridge/intel/i82801ax/i82801ax.h
@@ -24,9 +24,7 @@
 #if !defined(__PRE_RAM__)
 #include "chip.h"
 void i82801ax_enable(device_t dev);
-#endif
-
-#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+#else
 void enable_smbus(void);
 int smbus_read_byte(u8 device, u8 address);
 #endif
diff --git a/src/southbridge/intel/i82801bx/i82801bx.h b/src/southbridge/intel/i82801bx/i82801bx.h
index 202b41cbff..b2ee79c745 100644
--- a/src/southbridge/intel/i82801bx/i82801bx.h
+++ b/src/southbridge/intel/i82801bx/i82801bx.h
@@ -26,7 +26,7 @@
 extern void i82801bx_enable(device_t dev);
 #endif
 
-#if defined(__PRE_RAM__) && !defined(__ROMCC__)
+#if defined(__PRE_RAM__)
 void enable_smbus(void);
 int smbus_read_byte(u8 device, u8 address);
 #endif
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index dba5bd6d8d..c7d7e77e79 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -31,7 +31,7 @@
 #ifndef I82801DX_H
 #define I82801DX_H
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 #if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801dx_enable(device_t dev);
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index b5df5d9d32..1064dde8a0 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -37,7 +37,7 @@
 #ifndef __ACPI__
 #define DEBUG_PERIODIC_SMIS 0
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 #if !defined(__PRE_RAM__)
 #include "chip.h"
 extern void i82801gx_enable(device_t dev);
diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
index 7246739bb5..21933b4660 100644
--- a/src/southbridge/intel/lynxpoint/pch.h
+++ b/src/southbridge/intel/lynxpoint/pch.h
@@ -21,7 +21,6 @@
 #ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
 #define SOUTHBRIDGE_INTEL_LYNXPOINT_PCH_H
 
-
 /*
  * Lynx Point PCH PCI Devices:
  *
@@ -125,7 +124,7 @@ struct rcba_config_instruction
 	u32 or_value;
 };
 
-#if !defined(__ASSEMBLER__) && !defined(__ROMCC__)
+#if !defined(__ASSEMBLER__)
 void pch_config_rcba(const struct rcba_config_instruction *rcba_config);
 int pch_silicon_revision(void);
 int pch_silicon_type(void);
diff --git a/src/southbridge/nvidia/mcp55/mcp55.h b/src/southbridge/nvidia/mcp55/mcp55.h
index 5454d79f9d..4fb3391079 100644
--- a/src/southbridge/nvidia/mcp55/mcp55.h
+++ b/src/southbridge/nvidia/mcp55/mcp55.h
@@ -33,9 +33,7 @@
 void mcp55_enable(device_t dev);
 extern struct pci_operations mcp55_pci_ops;
 #else
-#if !defined(__ROMCC__)
 void enable_fid_change_on_sb(unsigned sbbusn, unsigned sbdn);
 #endif
-#endif
 
 #endif
diff --git a/src/southbridge/sis/sis966/sis966.h b/src/southbridge/sis/sis966/sis966.h
index 6c1e7e2add..6085ab5a29 100644
--- a/src/southbridge/sis/sis966/sis966.h
+++ b/src/southbridge/sis/sis966/sis966.h
@@ -35,8 +35,6 @@
 #define DEBUG_USB 0
 #define DEBUG_USB2 0
 
-#if !defined(__ROMCC__)
 void sis966_enable(device_t dev);
-#endif
 
 #endif /* SIS966_H */
diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index b43ce3cb3e..3cca58d9ed 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -145,7 +145,6 @@ __attribute__ ((packed))
 
 
 #ifdef __PRE_RAM__
-#ifndef __ROMCC__
 u8 smbus_read_byte(u8 dimm, u8 offset);
 void smbus_write_byte(u8 dimm, u8 offset, u8 data);
 void enable_smbus(void);
@@ -155,7 +154,6 @@ void vt8237_sb_enable_fid_vid(void);
 void enable_rom_decode(void);
 void vt8237_early_spi_init(void);
 int vt8237_early_network_init(struct vt8237_network_rom *rom);
-#endif
 #else
 void writeback(device_t dev, u16 where, u8 what);
 void dump_south(device_t dev);