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-rw-r--r--src/southbridge/intel/i82801gx/chip.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/chip.h b/src/southbridge/intel/i82801gx/chip.h
index ba8dd6f438..04b82d321b 100644
--- a/src/southbridge/intel/i82801gx/chip.h
+++ b/src/southbridge/intel/i82801gx/chip.h
@@ -63,9 +63,9 @@ struct southbridge_intel_i82801gx_config {
/* Enable linear PCIe Root Port function numbers starting at zero */
bool pcie_port_coalesce;
- int c4onc3_enable:1;
- int docking_supported:1;
- int p_cnt_throttling_supported:1;
+ bool c4onc3_enable;
+ bool docking_supported;
+ bool p_cnt_throttling_supported;
int c3_latency;
/* Additional LPC IO decode ranges */