diff options
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/intel/bd82x6x/early_rcba.c | 4 | ||||
-rw-r--r-- | src/southbridge/intel/common/rcba.h | 1 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 990ff0d874..9ce9dc9d41 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -60,9 +60,9 @@ southbridge_configure_default_intmap(void) DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); /* Enable IOAPIC (generic) */ - RCBA16(OIC) = 0x0100; + RCBA16(EOIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void) RCBA16(EOIC); } void diff --git a/src/southbridge/intel/common/rcba.h b/src/southbridge/intel/common/rcba.h index 1399fdef90..ad8285a500 100644 --- a/src/southbridge/intel/common/rcba.h +++ b/src/southbridge/intel/common/rcba.h @@ -147,6 +147,7 @@ #define D20IR 0x3160 /* 16bit */ #define D19IR 0x3168 /* 16bit */ +#define EOIC 0x31fe /* 16bit */ #define OIC 0x31ff /* 8bit */ #define DIR_ROUTE(x, a, b, c, d) \ |