diff options
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/pi/hudson/fadt.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/bd82x6x/fadt.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/i82371eb/fadt.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/fadt.c | 3 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/fadt.c | 3 |
5 files changed, 0 insertions, 13 deletions
diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index 4989d6b302..fe286fe273 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -44,8 +44,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; /* 32 bits */ fadt->gpe0_blk_len = 8; /* 64 bits */ - fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; - fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ fadt->day_alrm = 0; /* 0x7d these have to be */ diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index be315af8e1..a9e7a36e58 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -31,9 +31,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16; - /* P_LVLx not used */ - fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; - fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; /* P_CNT not supported */ fadt->duty_offset = 0; fadt->duty_width = 0; diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index fc3258ae9b..681d09ca95 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -36,8 +36,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 4; - fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; - fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* bit 1:3 in PCNTRL reg (pmbase+0x10) */ fadt->duty_width = 3; /* this width is in bits */ fadt->day_alrm = 0x0d; /* rtc CMOS RAM offset */ diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index 9921b4d587..d6084eeaa4 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -31,9 +31,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->pm2_cnt_len = 1; fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 16; - /* P_LVLx not used */ - fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; - fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; /* P_CNT not supported */ fadt->duty_offset = 0; fadt->duty_width = 0; diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c index fc08f01087..ba9439cb11 100644 --- a/src/southbridge/intel/lynxpoint/fadt.c +++ b/src/southbridge/intel/lynxpoint/fadt.c @@ -44,9 +44,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) else fadt->gpe0_blk_len = 2 * 8; - /* P_LVLx not used */ - fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; - fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 0; fadt->duty_width = 0; fadt->day_alrm = 0xd; |