diff options
Diffstat (limited to 'src/southbridge')
-rw-r--r-- | src/southbridge/nvidia/ck804/Kconfig | 4 | ||||
-rw-r--r-- | src/southbridge/nvidia/ck804/id.inc | 15 | ||||
-rw-r--r-- | src/southbridge/nvidia/ck804/id.lds | 6 | ||||
-rw-r--r-- | src/southbridge/nvidia/mcp55/Kconfig | 4 | ||||
-rw-r--r-- | src/southbridge/nvidia/mcp55/id.inc | 36 | ||||
-rw-r--r-- | src/southbridge/nvidia/mcp55/id.lds | 27 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/Kconfig | 4 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/id.inc | 36 | ||||
-rw-r--r-- | src/southbridge/sis/sis966/id.lds | 27 |
9 files changed, 12 insertions, 147 deletions
diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig index 92c8fbabdc..810b5b852f 100644 --- a/src/southbridge/nvidia/ck804/Kconfig +++ b/src/southbridge/nvidia/ck804/Kconfig @@ -3,3 +3,7 @@ config SOUTHBRIDGE_NVIDIA_CK804 select HAVE_HARD_RESET select IOAPIC +config ID_SECTION_OFFSET + hex + default 0x80 if SOUTHBRIDGE_NVIDIA_CK804 + diff --git a/src/southbridge/nvidia/ck804/id.inc b/src/southbridge/nvidia/ck804/id.inc deleted file mode 100644 index 3200a7d7de..0000000000 --- a/src/southbridge/nvidia/ck804/id.inc +++ /dev/null @@ -1,15 +0,0 @@ - .section ".id", "a", @progbits - - .globl __id_start -__id_start: -vendor: - .asciz CONFIG_MAINBOARD_VENDOR -part: - .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end + 0x80 - vendor /* Reverse offset to the vendor ID */ -.long __id_end + 0x80 - part /* Reverse offset to the part number */ -.long CONFIG_ROM_SIZE /* Size of this ROM image */ - .globl __id_end - -__id_end: -.previous diff --git a/src/southbridge/nvidia/ck804/id.lds b/src/southbridge/nvidia/ck804/id.lds deleted file mode 100644 index d95b9afcf4..0000000000 --- a/src/southbridge/nvidia/ck804/id.lds +++ /dev/null @@ -1,6 +0,0 @@ -SECTIONS { - . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); - .id (.): { - *(.id) - } -} diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index d0fc94bfba..96e2ebc942 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -1,2 +1,6 @@ config SOUTHBRIDGE_NVIDIA_MCP55 bool + +config ID_SECTION_OFFSET + hex + default 0x80 if SOUTHBRIDGE_NVIDIA_MCP55 diff --git a/src/southbridge/nvidia/mcp55/id.inc b/src/southbridge/nvidia/mcp55/id.inc deleted file mode 100644 index 7ea744c302..0000000000 --- a/src/southbridge/nvidia/mcp55/id.inc +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - .section ".id", "a", @progbits - - .globl __id_start -__id_start: -vendor: - .asciz CONFIG_MAINBOARD_VENDOR -part: - .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end + 0x80 - vendor /* Reverse offset to the vendor id */ -.long __id_end + 0x80 - part /* Reverse offset to the part number */ -.long CONFIG_ROM_SIZE /* Size of this romimage */ - .globl __id_end - -__id_end: -.previous diff --git a/src/southbridge/nvidia/mcp55/id.lds b/src/southbridge/nvidia/mcp55/id.lds deleted file mode 100644 index 53215beb63..0000000000 --- a/src/southbridge/nvidia/mcp55/id.lds +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -SECTIONS { - . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); - .id (.): { - *(.id) - } -} diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index a61c5ddff4..3d87e670a6 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -1,2 +1,6 @@ config SOUTHBRIDGE_SIS_SIS966 bool + +config ID_SECTION_OFFSET + hex + default 0x80 if SOUTHBRIDGE_SIS_SIS966 diff --git a/src/southbridge/sis/sis966/id.inc b/src/southbridge/sis/sis966/id.inc deleted file mode 100644 index 7ea744c302..0000000000 --- a/src/southbridge/sis/sis966/id.inc +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - .section ".id", "a", @progbits - - .globl __id_start -__id_start: -vendor: - .asciz CONFIG_MAINBOARD_VENDOR -part: - .asciz CONFIG_MAINBOARD_PART_NUMBER -.long __id_end + 0x80 - vendor /* Reverse offset to the vendor id */ -.long __id_end + 0x80 - part /* Reverse offset to the part number */ -.long CONFIG_ROM_SIZE /* Size of this romimage */ - .globl __id_end - -__id_end: -.previous diff --git a/src/southbridge/sis/sis966/id.lds b/src/southbridge/sis/sis966/id.lds deleted file mode 100644 index 53215beb63..0000000000 --- a/src/southbridge/sis/sis966/id.lds +++ /dev/null @@ -1,27 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 AMD - * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -SECTIONS { - . = (CONFIG_ROMBASE + CONFIG_ROM_IMAGE_SIZE - 0x80) - (__id_end - __id_start); - .id (.): { - *(.id) - } -} |