diff options
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/finalize.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/intel/bd82x6x/finalize.c b/src/southbridge/intel/bd82x6x/finalize.c index d50c8e6654..4a4f021a13 100644 --- a/src/southbridge/intel/bd82x6x/finalize.c +++ b/src/southbridge/intel/bd82x6x/finalize.c @@ -20,6 +20,7 @@ #include <arch/io.h> #include <arch/romcc_io.h> +#include <console/post_codes.h> #include <northbridge/intel/sandybridge/pcie_config.c> #include "pch.h" #include "spi.h" @@ -59,4 +60,7 @@ void intel_pch_finalize_smm(void) RCBA32(0x21a4) = RCBA32(0x21a4); pcie_write_config32(PCI_DEV(0, 27, 0), 0x74, pcie_read_config32(PCI_DEV(0, 27, 0), 0x74)); + + /* Indicate finalize step with post code */ + outb(POST_OS_BOOT, 0x80); } |