diff options
Diffstat (limited to 'src/southbridge')
141 files changed, 143 insertions, 0 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c index bb6a54ba42..a10068701c 100644 --- a/src/southbridge/amd/agesa/hudson/bootblock.c +++ b/src/southbridge/amd/agesa/hudson/bootblock.c @@ -15,6 +15,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c index af0cb58f6c..622931520f 100644 --- a/src/southbridge/amd/agesa/hudson/early_setup.c +++ b/src/southbridge/amd/agesa/hudson/early_setup.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/acpi.h> #include <console/console.h> #include <reset.h> diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index 83eaa46bb4..64f947eb67 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <cf9_reset.h> #include <reset.h> diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c index fae22ada3b..cbf0d30859 100644 --- a/src/southbridge/amd/amd8111/amd8111.c +++ b/src/southbridge/amd/amd8111/amd8111.c @@ -13,6 +13,7 @@ #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "amd8111.h" diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c index 0abd999efe..90ba000172 100644 --- a/src/southbridge/amd/amd8111/bootblock.c +++ b/src/southbridge/amd/amd8111/bootblock.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include <device/pci_type.h> diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c index 4925c86abe..15a03f5306 100644 --- a/src/southbridge/amd/amd8111/early_smbus.c +++ b/src/southbridge/amd/amd8111/early_smbus.c @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ +#include <device/pci_ops.h> #include "amd8111_smbus.h" #define SMBUS_IO_BASE 0x0f00 diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c index 62ae99e414..e1ac8a98ed 100644 --- a/src/southbridge/amd/amd8111/reset.c +++ b/src/southbridge/amd/amd8111/reset.c @@ -15,6 +15,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <reset.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c index 585d5a8f87..dae8df8288 100644 --- a/src/southbridge/amd/cimx/sb800/bootblock.c +++ b/src/southbridge/amd/cimx/sb800/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> static void enable_rom(void) { diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c index db87b6ac87..a8dfa31d9a 100644 --- a/src/southbridge/amd/cimx/sb800/fan.c +++ b/src/southbridge/amd/cimx/sb800/fan.c @@ -16,6 +16,7 @@ #include <southbridge/amd/cimx/cimx_util.h> #include <device/device.h> #include <device/pci.h> /* device_operations */ +#include <device/pci_ops.h> #include "SBPLATFORM.h" #include "sb_cimx.h" #include "chip.h" /* struct southbridge_amd_cimx_sb800_config */ diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index c66206f55c..872e045a1d 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -17,6 +17,7 @@ #include <device/device.h> #include <device/pci.h> /* device_operations */ +#include <device/pci_ops.h> #include <device/pci_ids.h> #include <bootstate.h> #include <arch/ioapic.h> diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index 2759af6488..8573f6fafe 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -20,6 +20,7 @@ #include <arch/ioapic.h> #include "lpc.h" #include <arch/io.h> +#include <device/pci_ops.h> void lpc_read_resources(struct device *dev) { diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c index db0aebb9ee..4b96d3c8c0 100644 --- a/src/southbridge/amd/cimx/sb800/reset.c +++ b/src/southbridge/amd/cimx/sb800/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <cf9_reset.h> #include <reset.h> diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c index a06946352c..734cc7a831 100644 --- a/src/southbridge/amd/cimx/sb900/bootblock.c +++ b/src/southbridge/amd/cimx/sb900/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> static void sb900_enable_rom(void) { diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c index 64b6aa51de..b04ecfa123 100644 --- a/src/southbridge/amd/cimx/sb900/lpc.c +++ b/src/southbridge/amd/cimx/sb900/lpc.c @@ -14,6 +14,7 @@ */ #include <device/pci.h> +#include <device/pci_ops.h> #include "lpc.h" #include <console/console.h> /* printk */ #include <arch/ioapic.h> diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c index db0aebb9ee..4b96d3c8c0 100644 --- a/src/southbridge/amd/cimx/sb900/reset.c +++ b/src/southbridge/amd/cimx/sb900/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <cf9_reset.h> #include <reset.h> diff --git a/src/southbridge/amd/common/amd_pci_util.c b/src/southbridge/amd/common/amd_pci_util.c index ca76809bf3..8bb2e0e4ef 100644 --- a/src/southbridge/amd/common/amd_pci_util.c +++ b/src/southbridge/amd/common/amd_pci_util.c @@ -16,6 +16,7 @@ #include <console/console.h> #include <device/pci.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <string.h> #include "amd_pci_util.h" #include <pc80/i8259.h> diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c index 32b129862d..0f5bdb142b 100644 --- a/src/southbridge/amd/pi/hudson/bootblock.c +++ b/src/southbridge/amd/pi/hudson/bootblock.c @@ -15,6 +15,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> /* diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index 3b91f9b813..0bed6ad17e 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -19,6 +19,7 @@ #include <assert.h> #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/acpi.h> #include <console/console.h> #include <reset.h> diff --git a/src/southbridge/amd/pi/hudson/imc.c b/src/southbridge/amd/pi/hudson/imc.c index bb630149b8..4b41ab5749 100644 --- a/src/southbridge/amd/pi/hudson/imc.c +++ b/src/southbridge/amd/pi/hudson/imc.c @@ -17,6 +17,7 @@ #include "imc.h" #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <delay.h> #include <Porting.h> diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index 83eaa46bb4..64f947eb67 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <cf9_reset.h> #include <reset.h> diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c index 017c76470a..0332f2f872 100644 --- a/src/southbridge/amd/rs780/early_setup.c +++ b/src/southbridge/amd/rs780/early_setup.c @@ -15,6 +15,7 @@ #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <northbridge/amd/amdmct/mct/mct_d.h> #include <console/console.h> #include <cpu/x86/msr.h> diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c index 364fa01c51..ed6f2561f5 100644 --- a/src/southbridge/amd/sb700/bootblock.c +++ b/src/southbridge/amd/sb700/bootblock.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #define IO_MEM_PORT_DECODE_ENABLE_5 0x48 #define IO_MEM_PORT_DECODE_ENABLE_6 0x4a diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 167986fa67..af2b6c1bce 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -20,6 +20,7 @@ #include <stdint.h> #include <option.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <device/pci.h> diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c index 4c9b0f4056..9a04459799 100644 --- a/src/southbridge/amd/sb700/reset.c +++ b/src/southbridge/amd/sb700/reset.c @@ -17,6 +17,7 @@ #define __SIMPLE_DEVICE__ #include <arch/io.h> +#include <device/pci_ops.h> #include <reset.h> #include <southbridge/amd/common/reset.h> diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h index 0b638f65c4..156522e579 100644 --- a/src/southbridge/amd/sb700/sb700.h +++ b/src/southbridge/amd/sb700/sb700.h @@ -73,6 +73,7 @@ void sb7xx_51xx_before_pci_init(void); uint16_t sb7xx_51xx_decode_last_reset(void); #else #include <device/pci.h> +#include <device/pci_ops.h> /* allow override in mainboard.c */ void sb7xx_51xx_setup_sata_phys(struct device *dev); void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5); diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c index b08d4775c4..9062118a90 100644 --- a/src/southbridge/amd/sb800/bootblock.c +++ b/src/southbridge/amd/sb800/bootblock.c @@ -15,6 +15,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> /* * Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF. diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h index 126b786246..30aeed25d6 100644 --- a/src/southbridge/amd/sr5650/cmn.h +++ b/src/southbridge/amd/sr5650/cmn.h @@ -18,6 +18,7 @@ #define __SR5650_CMN_H__ #include <arch/io.h> +#include <device/pci_ops.h> #define NBMISC_INDEX 0x60 #define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */ diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c index 8b6f22a793..8671882a9f 100644 --- a/src/southbridge/amd/sr5650/early_setup.c +++ b/src/southbridge/amd/sr5650/early_setup.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <cpu/amd/msr.h> diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c index 53ee8d4698..beaa94aeef 100644 --- a/src/southbridge/broadcom/bcm5785/bcm5785.c +++ b/src/southbridge/broadcom/bcm5785/bcm5785.c @@ -16,6 +16,7 @@ #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "bcm5785.h" diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c index 62b20a3f7b..3f7443694d 100644 --- a/src/southbridge/broadcom/bcm5785/bootblock.c +++ b/src/southbridge/broadcom/bcm5785/bootblock.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include <device/pci_type.h> diff --git a/src/southbridge/broadcom/bcm5785/early_smbus.c b/src/southbridge/broadcom/bcm5785/early_smbus.c index c702c651ba..260f1fc01a 100644 --- a/src/southbridge/broadcom/bcm5785/early_smbus.c +++ b/src/southbridge/broadcom/bcm5785/early_smbus.c @@ -14,6 +14,7 @@ * GNU General Public License for more details. */ +#include <device/pci_ops.h> #include "smbus.h" #define SMBUS_IO_BASE 0x1000 diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 673f0c74af..b0b8afa9eb 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" /* diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c index ee149d09b5..edb514bda7 100644 --- a/src/southbridge/intel/bd82x6x/early_me.c +++ b/src/southbridge/intel/bd82x6x/early_me.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <delay.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c index ed27573235..f6b26bf9e6 100644 --- a/src/southbridge/intel/bd82x6x/early_me_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <delay.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 167311f2ba..2e1c5fc2a2 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -15,6 +15,7 @@ #include <string.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/cbfs.h> #include <ip_checksum.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c index 3cd98ac5e4..d3847a5018 100644 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ b/src/southbridge/intel/bd82x6x/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c index a5c63b617f..f29ba5da6a 100644 --- a/src/southbridge/intel/bd82x6x/early_thermal.c +++ b/src/southbridge/intel/bd82x6x/early_thermal.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" #include "cpu/intel/model_206ax/model_206ax.h" #include <cpu/x86/msr.h> diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c index c34b3ec816..a7321c9991 100644 --- a/src/southbridge/intel/bd82x6x/early_usb.c +++ b/src/southbridge/intel/bd82x6x/early_usb.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <northbridge/intel/sandybridge/sandybridge.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c index e4fadad6cb..a19794e819 100644 --- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c +++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 1bbce066bf..f5516e39e9 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -24,6 +24,7 @@ #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index dc78e7184f..951c8ab4e4 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -24,6 +24,7 @@ #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 1a646b17b9..88ee0cbb38 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -24,6 +24,7 @@ #include <device/device.h> #include <device/pci.h> #endif +#include <device/pci_ops.h> #include "pch.h" #include <string.h> diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c index f86d8a01e4..4a62eb84a0 100644 --- a/src/southbridge/intel/bd82x6x/pci.c +++ b/src/southbridge/intel/bd82x6x/pci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "pch.h" diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c index 560584165b..39c53e88fc 100644 --- a/src/southbridge/intel/bd82x6x/pcie.c +++ b/src/southbridge/intel/bd82x6x/pcie.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pciexp.h> #include <device/pci_ids.h> #include <southbridge/intel/common/pciehp.h> diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index 00a65c8659..02d478ccb0 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 69df2bf68c..c7f668b178 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -16,6 +16,7 @@ #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c index 996c89c93f..b4060e526f 100644 --- a/src/southbridge/intel/bd82x6x/usb_ehci.c +++ b/src/southbridge/intel/bd82x6x/usb_ehci.c @@ -21,6 +21,7 @@ #include "pch.h" #include <device/pci_ehci.h> #include <arch/io.h> +#include <device/pci_ops.h> static void usb_ehci_init(struct device *dev) { diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c index 1b2755b4ab..d7b25c94b5 100644 --- a/src/southbridge/intel/bd82x6x/usb_xhci.c +++ b/src/southbridge/intel/bd82x6x/usb_xhci.c @@ -21,6 +21,7 @@ #include "pch.h" #include <device/pci_ehci.h> #include <arch/io.h> +#include <device/pci_ops.h> static void usb_xhci_init(struct device *dev) { diff --git a/src/southbridge/intel/bd82x6x/watchdog.c b/src/southbridge/intel/bd82x6x/watchdog.c index c186f353ba..4e40dd49f5 100644 --- a/src/southbridge/intel/bd82x6x/watchdog.c +++ b/src/southbridge/intel/bd82x6x/watchdog.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c index 8a511c331e..1186058cc9 100644 --- a/src/southbridge/intel/common/gpio.c +++ b/src/southbridge/intel/common/gpio.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index 563856c23e..ae13272026 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <assert.h> diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 4525934970..05b73f20c3 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -16,6 +16,7 @@ #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/acpi.h> #include <console/console.h> #include <cpu/x86/cache.h> diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 1d871d2c5d..429de8d447 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -23,6 +23,7 @@ #include <commonlib/helpers.h> #include <delay.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c index 31f84970d7..83e407860d 100644 --- a/src/southbridge/intel/common/usb_debug.c +++ b/src/southbridge/intel/common/usb_debug.c @@ -18,6 +18,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ehci.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c index f88e99987f..e111881581 100644 --- a/src/southbridge/intel/fsp_rangeley/acpi.c +++ b/src/southbridge/intel/fsp_rangeley/acpi.c @@ -20,6 +20,7 @@ #include <arch/acpi.h> #include <southbridge/intel/fsp_rangeley/soc.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <version.h> #if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c index 1ef8cb2add..05e2812134 100644 --- a/src/southbridge/intel/fsp_rangeley/early_init.c +++ b/src/southbridge/intel/fsp_rangeley/early_init.c @@ -19,6 +19,7 @@ #include <stdlib.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <pc80/mc146818rtc.h> #include <version.h> diff --git a/src/southbridge/intel/fsp_rangeley/early_smbus.c b/src/southbridge/intel/fsp_rangeley/early_smbus.c index 9b47837dd1..48b7769925 100644 --- a/src/southbridge/intel/fsp_rangeley/early_smbus.c +++ b/src/southbridge/intel/fsp_rangeley/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c index 0bcd09d65d..896ef64bad 100644 --- a/src/southbridge/intel/fsp_rangeley/early_usb.c +++ b/src/southbridge/intel/fsp_rangeley/early_usb.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include "soc.h" diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c index 0a287c4dc4..740587a23c 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.c +++ b/src/southbridge/intel/fsp_rangeley/gpio.c @@ -17,6 +17,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pci_ops.h> #include "soc.h" #include "gpio.h" diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c index 3e7c17a74e..4dee6362fb 100644 --- a/src/southbridge/intel/fsp_rangeley/lpc.c +++ b/src/southbridge/intel/fsp_rangeley/lpc.c @@ -23,6 +23,7 @@ #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> #include <arch/cpu.h> diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c index ec60920ac5..39d4362635 100644 --- a/src/southbridge/intel/fsp_rangeley/romstage.c +++ b/src/southbridge/intel/fsp_rangeley/romstage.c @@ -19,6 +19,7 @@ #include <lib.h> #include <timestamp.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <cpu/x86/lapic.h> #include <cbmem.h> diff --git a/src/southbridge/intel/fsp_rangeley/sata.c b/src/southbridge/intel/fsp_rangeley/sata.c index c1d574941a..c4d6fdaf49 100644 --- a/src/southbridge/intel/fsp_rangeley/sata.c +++ b/src/southbridge/intel/fsp_rangeley/sata.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c index fd83342ac7..ec5cd073ed 100644 --- a/src/southbridge/intel/fsp_rangeley/soc.c +++ b/src/southbridge/intel/fsp_rangeley/soc.c @@ -20,6 +20,7 @@ #include <delay.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include "soc.h" static int soc_revision_id = -1; diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 227422b270..34d0fa2111 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -20,6 +20,7 @@ #include <commonlib/helpers.h> #include <delay.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/fsp_rangeley/watchdog.c b/src/southbridge/intel/fsp_rangeley/watchdog.c index d7d3141e59..f18af8927c 100644 --- a/src/southbridge/intel/fsp_rangeley/watchdog.c +++ b/src/southbridge/intel/fsp_rangeley/watchdog.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <watchdog.h> diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c index 38b797d5a6..ea167b59f7 100644 --- a/src/southbridge/intel/i82371eb/bootblock.c +++ b/src/southbridge/intel/i82371eb/bootblock.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include <device/pci_type.h> #include "i82371eb.h" diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c index 720cb0d013..2233be0fec 100644 --- a/src/southbridge/intel/i82371eb/early_pm.c +++ b/src/southbridge/intel/i82371eb/early_pm.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci.h> #include <device/pci_def.h> #include <device/pci_ids.h> diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c index 4e91c0aabf..b8b6dbad59 100644 --- a/src/southbridge/intel/i82371eb/early_smbus.c +++ b/src/southbridge/intel/i82371eb/early_smbus.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/i82371eb/ide.c b/src/southbridge/intel/i82371eb/ide.c index e3ed178658..33f7ac7569 100644 --- a/src/southbridge/intel/i82371eb/ide.c +++ b/src/southbridge/intel/i82371eb/ide.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82371eb.h" diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c index 8030a750c8..b4041ef9e0 100644 --- a/src/southbridge/intel/i82371eb/isa.c +++ b/src/southbridge/intel/i82371eb/isa.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include <pc80/isa-dma.h> #include <pc80/mc146818rtc.h> diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c index 5b95c57d8d..afc4d6ac1e 100644 --- a/src/southbridge/intel/i82371eb/smbus.c +++ b/src/southbridge/intel/i82371eb/smbus.c @@ -18,6 +18,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <stdint.h> #include <device/device.h> diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c index f9a7904408..cbbc370252 100644 --- a/src/southbridge/intel/i82801dx/ac97.c +++ b/src/southbridge/intel/i82801dx/ac97.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <delay.h> #include "i82801dx.h" diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c index a5e48e5ded..1601b55cd6 100644 --- a/src/southbridge/intel/i82801dx/bootblock.c +++ b/src/southbridge/intel/i82801dx/bootblock.c @@ -13,6 +13,7 @@ #include <cpu/intel/car/bootblock.h> #include <arch/io.h> +#include <device/pci_ops.h> void bootblock_early_southbridge_init(void) { diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c index fabb58b55b..83fd9a13c8 100644 --- a/src/southbridge/intel/i82801dx/early_smbus.c +++ b/src/southbridge/intel/i82801dx/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c index f233eed395..765bcb2587 100644 --- a/src/southbridge/intel/i82801dx/i82801dx.c +++ b/src/southbridge/intel/i82801dx/i82801dx.c @@ -16,6 +16,7 @@ #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include "i82801dx.h" void i82801dx_enable(struct device *dev) diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c index bdea66f9b3..b977e32cd2 100644 --- a/src/southbridge/intel/i82801dx/smi.c +++ b/src/southbridge/intel/i82801dx/smi.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <string.h> diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c index e7a9589116..17bedabbbe 100644 --- a/src/southbridge/intel/i82801dx/smihandler.c +++ b/src/southbridge/intel/i82801dx/smihandler.c @@ -16,6 +16,7 @@ #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c index 9bf9456729..582c962197 100644 --- a/src/southbridge/intel/i82801gx/ac97.c +++ b/src/southbridge/intel/i82801gx/ac97.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <delay.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c index 6d65df3983..991f1bda6e 100644 --- a/src/southbridge/intel/i82801gx/bootblock.c +++ b/src/southbridge/intel/i82801gx/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "i82801gx.h" static void enable_spi_prefetch(void) diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index 9dddcec362..e970937e88 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c index a93d913a6d..6aab741737 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.c +++ b/src/southbridge/intel/i82801gx/i82801gx.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include "i82801gx.h" #include "sata.h" diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c index 97092726fa..e25eaae150 100644 --- a/src/southbridge/intel/i82801gx/ide.c +++ b/src/southbridge/intel/i82801gx/ide.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index b71693a7c2..a08bbf8d2c 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -22,6 +22,7 @@ #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c index 97ae98abdf..514db3cd64 100644 --- a/src/southbridge/intel/i82801gx/pci.c +++ b/src/southbridge/intel/i82801gx/pci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index c0f9c1239c..4679ee58f8 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c index 567c1e5047..bf473f6d95 100644 --- a/src/southbridge/intel/i82801gx/sata.c +++ b/src/southbridge/intel/i82801gx/sata.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801gx.h" #include "sata.h" diff --git a/src/southbridge/intel/i82801gx/usb.c b/src/southbridge/intel/i82801gx/usb.c index eaa2cf19cd..307b5ac622 100644 --- a/src/southbridge/intel/i82801gx/usb.c +++ b/src/southbridge/intel/i82801gx/usb.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801gx.h" diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c index b40c83d56d..9b79aff5c3 100644 --- a/src/southbridge/intel/i82801gx/usb_ehci.c +++ b/src/southbridge/intel/i82801gx/usb_ehci.c @@ -21,6 +21,7 @@ #include "i82801gx.h" #include <device/pci_ehci.h> #include <arch/io.h> +#include <device/pci_ops.h> static void usb_ehci_init(struct device *dev) { diff --git a/src/southbridge/intel/i82801gx/watchdog.c b/src/southbridge/intel/i82801gx/watchdog.c index ff4da6412c..12284b46c1 100644 --- a/src/southbridge/intel/i82801gx/watchdog.c +++ b/src/southbridge/intel/i82801gx/watchdog.c @@ -16,6 +16,7 @@ #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <watchdog.h> diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c index 6252712eba..8174623847 100644 --- a/src/southbridge/intel/i82801ix/bootblock.c +++ b/src/southbridge/intel/i82801ix/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> static void enable_spi_prefetch(void) { diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c index f7e2fd2621..da124ff54f 100644 --- a/src/southbridge/intel/i82801ix/early_init.c +++ b/src/southbridge/intel/i82801ix/early_init.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "i82801ix.h" void i82801ix_early_init(void) diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c index 0dda0c84b9..6949a309f6 100644 --- a/src/southbridge/intel/i82801ix/early_smbus.c +++ b/src/southbridge/intel/i82801ix/early_smbus.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c index f3027bf260..991ae82259 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.c +++ b/src/southbridge/intel/i82801ix/i82801ix.c @@ -18,6 +18,7 @@ #include <stdlib.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <console/console.h> diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index ddecc0cd71..bfa875b74d 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -204,6 +204,8 @@ #ifndef __ACPI__ #ifndef __ASSEMBLER__ +#include <device/pci_ops.h> + static inline int lpc_is_mobile(const u16 devid) { return (devid == 0x2917) || (devid == 0x2919); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index f9e11140ff..db5d3a641a 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -23,6 +23,7 @@ #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801ix/pci.c b/src/southbridge/intel/i82801ix/pci.c index 13f92f064a..4003e740c4 100644 --- a/src/southbridge/intel/i82801ix/pci.c +++ b/src/southbridge/intel/i82801ix/pci.c @@ -16,6 +16,7 @@ #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801ix.h" diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c index 04eb9b938b..a36fdc617c 100644 --- a/src/southbridge/intel/i82801ix/pcie.c +++ b/src/southbridge/intel/i82801ix/pcie.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pciexp.h> #include <device/pci_ids.h> #include <southbridge/intel/common/pciehp.h> diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index e3b7e14b8c..65422c8344 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c index 74fa495695..a9d5e7dc08 100644 --- a/src/southbridge/intel/i82801ix/smi.c +++ b/src/southbridge/intel/i82801ix/smi.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/acpi.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801ix/thermal.c b/src/southbridge/intel/i82801ix/thermal.c index 931198254d..325eb08aae 100644 --- a/src/southbridge/intel/i82801ix/thermal.c +++ b/src/southbridge/intel/i82801ix/thermal.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/southbridge/intel/i82801ix/usb_ehci.c b/src/southbridge/intel/i82801ix/usb_ehci.c index e386f825d9..8768e3e0cf 100644 --- a/src/southbridge/intel/i82801ix/usb_ehci.c +++ b/src/southbridge/intel/i82801ix/usb_ehci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801ix.h" #include <device/pci_ehci.h> diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c index 911361af6b..011c15c2e5 100644 --- a/src/southbridge/intel/i82801jx/bootblock.c +++ b/src/southbridge/intel/i82801jx/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "i82801jx.h" static void enable_spi_prefetch(void) diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c index 8c870454fe..d2b87d1812 100644 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ b/src/southbridge/intel/i82801jx/early_smbus.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c index 64859f8ed1..d15f0e3556 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.c +++ b/src/southbridge/intel/i82801jx/i82801jx.c @@ -18,6 +18,7 @@ #include <stdlib.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <console/console.h> diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h index 00148480a1..2a85d5ad23 100644 --- a/src/southbridge/intel/i82801jx/i82801jx.h +++ b/src/southbridge/intel/i82801jx/i82801jx.h @@ -224,6 +224,8 @@ #ifndef __ACPI__ #ifndef __ASSEMBLER__ +#include <device/pci_ops.h> + static inline int lpc_is_mobile(const u16 devid) { return (devid == 0x2917) || (devid == 0x2919); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 6027d152ef..f157fa5f61 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -23,6 +23,7 @@ #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> #include <cpu/x86/smm.h> diff --git a/src/southbridge/intel/i82801jx/pci.c b/src/southbridge/intel/i82801jx/pci.c index cfafda09cc..a32d4a94b0 100644 --- a/src/southbridge/intel/i82801jx/pci.c +++ b/src/southbridge/intel/i82801jx/pci.c @@ -16,6 +16,7 @@ #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801jx.h" diff --git a/src/southbridge/intel/i82801jx/pcie.c b/src/southbridge/intel/i82801jx/pcie.c index f5eaca5798..fb90cd962a 100644 --- a/src/southbridge/intel/i82801jx/pcie.c +++ b/src/southbridge/intel/i82801jx/pcie.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pciexp.h> #include <device/pci_ids.h> #include <southbridge/intel/common/pciehp.h> diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index 5978294616..bb175e6eb1 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/i82801jx/thermal.c b/src/southbridge/intel/i82801jx/thermal.c index 4a8ba290f3..d3f0122f22 100644 --- a/src/southbridge/intel/i82801jx/thermal.c +++ b/src/southbridge/intel/i82801jx/thermal.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/southbridge/intel/i82801jx/usb_ehci.c b/src/southbridge/intel/i82801jx/usb_ehci.c index 0aad672fab..543ac57f01 100644 --- a/src/southbridge/intel/i82801jx/usb_ehci.c +++ b/src/southbridge/intel/i82801jx/usb_ehci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "i82801jx.h" #include <device/pci_ehci.h> diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c index 8760a82435..241584bb49 100644 --- a/src/southbridge/intel/ibexpeak/early_smbus.c +++ b/src/southbridge/intel/ibexpeak/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/ibexpeak/early_thermal.c b/src/southbridge/intel/ibexpeak/early_thermal.c index 4e4860c61d..6c9f794fc2 100644 --- a/src/southbridge/intel/ibexpeak/early_thermal.c +++ b/src/southbridge/intel/ibexpeak/early_thermal.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" #include "cpu/intel/model_2065x/model_2065x.h" #include <cpu/x86/msr.h> diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index edbb57e799..7ae178ef65 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -23,6 +23,7 @@ #include <pc80/isa-dma.h> #include <pc80/i8259.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <arch/ioapic.h> #include <arch/acpi.h> #include <arch/cpu.h> diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c index b1ff815edb..8eafd355c0 100644 --- a/src/southbridge/intel/ibexpeak/me.c +++ b/src/southbridge/intel/ibexpeak/me.c @@ -24,6 +24,7 @@ #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c index 3833e12a70..ea666663b2 100644 --- a/src/southbridge/intel/ibexpeak/sata.c +++ b/src/southbridge/intel/ibexpeak/sata.c @@ -16,6 +16,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c index 31736628b3..d9d021571f 100644 --- a/src/southbridge/intel/ibexpeak/smi.c +++ b/src/southbridge/intel/ibexpeak/smi.c @@ -20,6 +20,7 @@ #include <device/pci.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> #include <string.h> diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index d305635398..e6e4682057 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -16,6 +16,7 @@ #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c index 374cbf11dc..bafc83ba31 100644 --- a/src/southbridge/intel/ibexpeak/thermal.c +++ b/src/southbridge/intel/ibexpeak/thermal.c @@ -20,6 +20,7 @@ #include <device/pci_ids.h> #include "pch.h" #include <arch/io.h> +#include <device/pci_ops.h> static void thermal_init(struct device *dev) { diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c index 13670b8ca1..b67a96a1e2 100644 --- a/src/southbridge/intel/ibexpeak/usb_ehci.c +++ b/src/southbridge/intel/ibexpeak/usb_ehci.c @@ -22,6 +22,7 @@ #include "pch.h" #include <device/pci_ehci.h> #include <arch/io.h> +#include <device/pci_ops.h> static void usb_ehci_init(struct device *dev) { diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c index cb595cdd0c..82fe07ebdc 100644 --- a/src/southbridge/intel/lynxpoint/bootblock.c +++ b/src/southbridge/intel/lynxpoint/bootblock.c @@ -14,6 +14,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" /* diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c index e02a16c41a..b02f19580c 100644 --- a/src/southbridge/intel/lynxpoint/early_me.c +++ b/src/southbridge/intel/lynxpoint/early_me.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <delay.h> #include <halt.h> diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 912df8ea4c..a5c69e050c 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -16,6 +16,7 @@ #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci_def.h> #include <elog.h> diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c index 3cd98ac5e4..d3847a5018 100644 --- a/src/southbridge/intel/lynxpoint/early_smbus.c +++ b/src/southbridge/intel/lynxpoint/early_smbus.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci_def.h> #include <southbridge/intel/common/smbus.h> diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 4b447161ef..c0186dbc79 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c index b6edc8da1f..48e0be3aaf 100644 --- a/src/southbridge/intel/lynxpoint/lp_gpio.c +++ b/src/southbridge/intel/lynxpoint/lp_gpio.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <string.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index 1a0a68c9db..08085afb58 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -24,6 +24,7 @@ #include <arch/acpi.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index b197bbcfc4..74943c6cb7 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -18,6 +18,7 @@ #include <console/console.h> #include <delay.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/lynxpoint/pci.c b/src/southbridge/intel/lynxpoint/pci.c index 3c43210dd9..6c26bb8e40 100644 --- a/src/southbridge/intel/lynxpoint/pci.c +++ b/src/southbridge/intel/lynxpoint/pci.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <device/pci_ids.h> #include "pch.h" diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c index 30e8aa8732..aa18f4a59b 100644 --- a/src/southbridge/intel/lynxpoint/sata.c +++ b/src/southbridge/intel/lynxpoint/sata.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c index 92fa9503aa..44c9a07882 100644 --- a/src/southbridge/intel/lynxpoint/serialio.c +++ b/src/southbridge/intel/lynxpoint/serialio.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <cbmem.h> #include <console/console.h> #include <device/device.h> diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index fd1ba228a6..8c46ab0255 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -18,6 +18,7 @@ #include <delay.h> #include <types.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c index 7f300d68eb..977dcfac40 100644 --- a/src/southbridge/intel/lynxpoint/usb_ehci.c +++ b/src/southbridge/intel/lynxpoint/usb_ehci.c @@ -21,6 +21,7 @@ #include <device/pci_ids.h> #include <device/pci_ehci.h> #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" #ifdef __SMM__ diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c index 03341da829..490740e730 100644 --- a/src/southbridge/intel/lynxpoint/usb_xhci.c +++ b/src/southbridge/intel/lynxpoint/usb_xhci.c @@ -19,6 +19,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <arch/io.h> +#include <device/pci_ops.h> #include "pch.h" typedef struct southbridge_intel_lynxpoint_config config_t; diff --git a/src/southbridge/intel/lynxpoint/watchdog.c b/src/southbridge/intel/lynxpoint/watchdog.c index ec7cb5d0b5..545d3d50d5 100644 --- a/src/southbridge/intel/lynxpoint/watchdog.c +++ b/src/southbridge/intel/lynxpoint/watchdog.c @@ -17,6 +17,7 @@ #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> #include <watchdog.h> diff --git a/src/southbridge/nvidia/ck804/bootblock.c b/src/southbridge/nvidia/ck804/bootblock.c index 24ca0a8fab..4275472d87 100644 --- a/src/southbridge/nvidia/ck804/bootblock.c +++ b/src/southbridge/nvidia/ck804/bootblock.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "ck804.h" static void ck804_enable_rom(void) diff --git a/src/southbridge/nvidia/ck804/early_smbus.c b/src/southbridge/nvidia/ck804/early_smbus.c index f7bddbf674..a310422d91 100644 --- a/src/southbridge/nvidia/ck804/early_smbus.c +++ b/src/southbridge/nvidia/ck804/early_smbus.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci.h> #include <device/pci_def.h> diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c index 7296e0526d..c866138d4b 100644 --- a/src/southbridge/nvidia/ck804/enable_usbdebug.c +++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ehci.h> #include <device/pci_def.h> #include "ck804.h" diff --git a/src/southbridge/nvidia/mcp55/bootblock.c b/src/southbridge/nvidia/mcp55/bootblock.c index 6d24f568da..9a04a87144 100644 --- a/src/southbridge/nvidia/mcp55/bootblock.c +++ b/src/southbridge/nvidia/mcp55/bootblock.c @@ -19,6 +19,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include "mcp55.h" static void mcp55_enable_rom(void) diff --git a/src/southbridge/nvidia/mcp55/early_smbus.c b/src/southbridge/nvidia/mcp55/early_smbus.c index f52d079a12..fe9ccdd746 100644 --- a/src/southbridge/nvidia/mcp55/early_smbus.c +++ b/src/southbridge/nvidia/mcp55/early_smbus.c @@ -18,6 +18,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <device/pci.h> #include "smbus.h" diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c index 69e085984d..b4b428635d 100644 --- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c +++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_ehci.h> #include <device/pci_def.h> #include "mcp55.h" |