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-rw-r--r--src/southbridge/via/vt8237r/vt8237r_early_smbus.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 4dd3678097..aa75f50651 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -295,9 +295,10 @@ void enable_rom_decode(void)
pci_write_config8(dev, 0x41, 0x7f);
}
+#ifdef CONFIG_NORTHBRIDGE_AMD_K8 /* CN700 doesn't have the support yet */
#define ACPI_IS_WAKEUP_EARLY 1
-int acpi_is_wakeup_early(void) {
+static int acpi_is_wakeup_early(void) {
device_t dev;
u16 tmp;
@@ -325,6 +326,7 @@ int acpi_is_wakeup_early(void) {
print_debug_hex8(tmp);
return ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ;
}
+#endif
#if defined(__GNUC__)
void vt8237_early_spi_init(void)