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-rw-r--r--src/southbridge/via/vt8237r/vt8237r_lpc.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index 4af73af263..5d2579e530 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -222,6 +222,13 @@ void setup_pm(device_t dev)
/* SCI is generated for RTC/pwrBtn/slpBtn. */
outw(0x001, VT8237R_ACPI_IO_BASE + 0x04);
+
+ /* FIXME: Intel needs more bit set for C2/C3. */
+
+ /* Allow SLP# signal to assert LDTSTOP_L.
+ * Will work for C3 and for FID/VID change.
+ */
+ outb(0x1, VT8237R_ACPI_IO_BASE + 0x11);
}
static void vt8237r_init(struct device *dev)